Internet access standards: dissemination of the Integrated Services Digital Network in Spain, 1984-2005

This article aims to narrate the birth and evolution of the Integrated Services Digital Network (ISDN) in Spain with an essentially descriptive methodology, from an interdisciplinary perspective and from varied sources. The study aims to investigate the forms of the transition from a conceptual or engineering phase to the market in a standard of Internet access and, at the same time, in the different patterns of technological innovation and the factors that motivate them. It tries to verify if the own nature of the techniques, the degree of diffusion of the previous technologies, the technological level -digitalization- and the structure of market of the telecommunications — continued existence of the monopoly of the historical operator National Telephone Company of Spain — had a significant impact on the inequality of penetration with respect to other countries. The research authorizes to conclude that a very heterogeneous combination of factors caused that leading countries in the diffusion of a technology did not achieve that leading role in the diffusion of other technologies.

CRC 8-bit Encoder-Decoder Component in FPGA using VHDL

AbstrakCyclic Redundancy Check (CRC) adalah salah satu jenis dari deteksi kesalahan yang digunakan pada pengiriman data. CRC umumnya digunakan di jaringan digital dan perangkat penyimpanan untuk mendeteksi perubahan tidak disengaja pada data asli. CRC memiliki keandalan yang tinggi dalam pengiriman data karena CRC menggunakan algoritma berdasarkan cyclic code. Pada artikel ini generator polinomial yang digunakan dalam encoder dan decoder adalah CCITT dan dengan lebar bit data 8 bit. CRC-8-CCITT biasanya digunakan pada Asynchronous Transfer Mode (ATM) headers, Integrated Services Digital Network (ISDN) HEC, dll. Pada penelitian ini dilakukan perancangan dan diterapkan dengan menggunakan VHDL. Software pendukung yang digunakan untuk mengimplementasikan VHDL adalah Xilinx ISE 8.1i.Kata kunci: Cyclic Redundancy Check (CRC), VHDL Language, Xilinx ISE 8.1iAbstractCyclic Redundancy Check (CRC) is one type of error detection used in data transmission. CRC commonly used in digital networks and storage devices to detect accidental changes to raw data. CRC has high reliability in data transmission because uses algorithms based on cyclic codes. In this article the polynomial generator used in the encoder and decoder is the CCITT and with a width of 8 bits data bits.CRC-8-CCITT usually used at Asynchronous Transfer Mode (ATM) headers, Integrated Services Digital Network (ISDN) HEC, etc. This article presents design and implementation of a component using VHDL. The supporting software used to implement VHDL is Xilinx ISE 8.1i.Keywords: Cyclic Redundancy Check (CRC), VHDL Language, Xilinx ISE 8.1i