A Nonlinear Model For The Optimal Capacity Placement In Self-Healing ATM Networks Based On Link Restoration Strategy

Network Survivability is a critical issue in telecommunications network due to increasing dependence of the society on communication systems. Fast restoration from a network failure is an important challenge that deserves attention. This thesis addresses an optimal link capacity design problem for survivable asynchronous transfer mode (ATM) network based on the link restoration strategy. Given a projected traffic demands and the network topology, capacity and flow assignment are jointly optimized to yield the optimal capacity placement. The problem is formulated as large-scale nonlinear programming and is solved using a specific type of Lagrange method (so called Separable Augmented Lagrangian Algorithm or SALA for short). Several networks with diverse topological characteristics are used in the experiments to validate our proposed novel model, using capacity installation cost, routing cost, total network cost, used capacity and required CPU time, as performance metrics. Link restoration strategy is compared against global reconfiguration strategy using these performance metrics.

A Nonlinear Model For The Optimal Capacity Placement In Self-Healing ATM Networks Based On Link Restoration Strategy

Network Survivability is a critical issue in telecommunications network due to increasing dependence of the society on communication systems. Fast restoration from a network failure is an important challenge that deserves attention. This thesis addresses an optimal link capacity design problem for survivable asynchronous transfer mode (ATM) network based on the link restoration strategy. Given a projected traffic demands and the network topology, capacity and flow assignment are jointly optimized to yield the optimal capacity placement. The problem is formulated as large-scale nonlinear programming and is solved using a specific type of Lagrange method (so called Separable Augmented Lagrangian Algorithm or SALA for short). Several networks with diverse topological characteristics are used in the experiments to validate our proposed novel model, using capacity installation cost, routing cost, total network cost, used capacity and required CPU time, as performance metrics. Link restoration strategy is compared against global reconfiguration strategy using these performance metrics.

Effect of Backhaul Technologies on 3G Network Performance: A Case Study of Ado-Ekiti

In the past years, when wireless network improvement occurs from 1G/2G to third generation (3G), the rate in the use of real-time traffic oriented applications for voice, video and data increases. Consequently, the bandwidth to be backhauled from the cell site to the mobile switching center increases rapidly. 3G network is most prevalent in Nigeria with wide area of coverage. However, in recent times, poor subscribers’ mobile broadband experience is still the major challenge faced by many GSM operators. One of the major causes of this challenge is the use of wrong backhaul for radio access network (RAN). This lead to poor traffic throughput, high packet loss or frame loss at the cell edge. To overcome this challenge, the use of appropriate backhaul technology is crucial. Third Generation Partnership Program (3GPP) recommends the use of either asynchronous transfer mode (ATM) or internet protocol (IP) as the backhaul technologies for its RAN. This paper presents the performance analysis and the comparison of the ATM RAN and IP RAN backhaul technologies using six different 3G sites (with 3G base stations) located at Ado local government area of Ekiti State, Nigeria. The performance of each base station with different backhaul technology was evaluated in term of average maximum throughput per day. The effect of frame loss (for ATM RAN network) and packet loss (for IP RAN network) on traffic throughput were also analyzed. The comparison of the overall result analysis shows that the 3G base stations with IP-based RAN backhaul has better performance than the base station with ATM-based RAN backhaul.

VLSI Design of A Chip With High Speed Atm Switch-A Review

In current computer communication network, it is overwhelmed by two technologies, in particular Asynchronous Transfer Mode (ATM) and Internet Protocol (IP). Association situated ATM is the awesome constant administrations which require ensured nature of-administration like video conferencing. Be that as it may, connectionless IP is more proficient than ATM for non-ongoing administrations like email. Right now, the significant exploration challenge is on the most proficient method to coordinate ATM and IP into a solitary network effectively. It is shown by the acknowledgment of the highlight of the A/I Net architecture: the A/I Switch. In this postulation, a VLSI execution of a multistage self-steering ATM switch texture which is one of the vital parts of the A/I Switch will be presented. The size of the switch model is 16x16. The chip is intended to work at the very least frequency of 100MHz and the framework is equipped for dealing with the OC-12 (622 Mbps) connect rate. In view of a piece cut architecture, the whole 16x16 switch is acknowledged utilizing four indistinguishable chips. It accomplishes elite by using dispersed control and accelerate with the input-output buffering technique. A need structure, which upholds four-level, permits the postponement delicate ATM cells to be switched with the briefest inertness. It likewise empowers the non-interleaving directing plan of IP cells.

Lasers in Passive Optical Networks and the Activation Process of an End Unit: A Tutorial

It is 21 years since the first passive optical network (PON) was standardized as an asynchronous transfer mode passive optical network (APON) with same optical distribution network scheme as we know in current networks. A lot of PON networks were standardized in the following years and became an important part of telecommunication. The general principles of these PON networks are described in many papers and books, but only a little information about used lasers is available. The aim of this tutorial is to describe lasers used in PON networks and principles of their operation. The paper describes the principles of single longitudinal mode (SLM), multi longitudinal mode (MLM), distributed-feedback (DFB), and Fabry–Pérot (FP) lasers. Furthermore, the lasers are compared by their usage in optical line termination (OLT) for passive optical networks. The second part of this tutorial deals with activation process of optical network unit. The described principle is the same for connection of a new customer or blackout scenario. The end unit is not able to communicate until reach the operational state; each state is defined with physical layer operation and administration and maintenance (PLOAM) messages sequence and their processing.

CRC 8-bit Encoder-Decoder Component in FPGA using VHDL

AbstrakCyclic Redundancy Check (CRC) adalah salah satu jenis dari deteksi kesalahan yang digunakan pada pengiriman data. CRC umumnya digunakan di jaringan digital dan perangkat penyimpanan untuk mendeteksi perubahan tidak disengaja pada data asli. CRC memiliki keandalan yang tinggi dalam pengiriman data karena CRC menggunakan algoritma berdasarkan cyclic code. Pada artikel ini generator polinomial yang digunakan dalam encoder dan decoder adalah CCITT dan dengan lebar bit data 8 bit. CRC-8-CCITT biasanya digunakan pada Asynchronous Transfer Mode (ATM) headers, Integrated Services Digital Network (ISDN) HEC, dll. Pada penelitian ini dilakukan perancangan dan diterapkan dengan menggunakan VHDL. Software pendukung yang digunakan untuk mengimplementasikan VHDL adalah Xilinx ISE 8.1i.Kata kunci: Cyclic Redundancy Check (CRC), VHDL Language, Xilinx ISE 8.1iAbstractCyclic Redundancy Check (CRC) is one type of error detection used in data transmission. CRC commonly used in digital networks and storage devices to detect accidental changes to raw data. CRC has high reliability in data transmission because uses algorithms based on cyclic codes. In this article the polynomial generator used in the encoder and decoder is the CCITT and with a width of 8 bits data bits.CRC-8-CCITT usually used at Asynchronous Transfer Mode (ATM) headers, Integrated Services Digital Network (ISDN) HEC, etc. This article presents design and implementation of a component using VHDL. The supporting software used to implement VHDL is Xilinx ISE 8.1i.Keywords: Cyclic Redundancy Check (CRC), VHDL Language, Xilinx ISE 8.1i

Interaction With ATM for Blind

<p>A talking ATM may be a kind of Asynchronous Transfer Mode (ATM) that gives perceptible directions so that persons United Nations agency will not scan associate degree ATM screen can severally use the machine. All perceptible data is delivered in private through an earpiece jack on the face of the device or an on an individual basis hooked up a telephone. Information provided to the client either through pre-recorded sound files or via text-to-speech synthesis A user plugs a conventional telephone receiver into the jack, hear directions and also the user can respond to voice. In spite of everything, the small print is given press OK button for confirmation. There's associate degree perceptible orientation for initial time users, and perceptible data describing the placement of options like the OK button, deposit slot, and card slot. During this application is principally developed for the blind individuals. The blind people cannot see the keyboard and also the screen for the system. They enter the input details through voice. The voice to text converter can convert into text and method additional way. The system offers the instruction regarding the system usage through voice.</p>