FPGA-Based Cost-Effective and Resource Optimized Solution of Predictive Direct Current Control for Power Converters

Recent advances in power converter applications with highly demanding control goals require the efficient implementation of superior control strategies. However, the real-time application of such control strategies demands high computational power that necessitates efficient digital controllers like field programmable gate array (FPGA). The inherent parallelism offered by FPGAs minimizes the execution time and exhibits an excellent cost-performance trade-off. In addition, rapid advancements in FPGA technology with a broad portfolio of intellectual property (IP) cores, design tools, and robust embedded processors resulted in a design paradigm shift. This article proposes a low-cost solution for the resource-optimized implementation of dynamic, highly accurate, and computationally intensive finite state-predictive direct current control (FS-PDCC). The challenges for implementing complex control algorithms for power converters are discussed in detail, and the control is implemented in Intel’s low-cost non-volatile FPGA-MAX®10. An efficient design methodology using finite state machine (FSM) is adopted to achieve time/resource-efficient implementation. The parallel and pipelined architecture of FPGA provides better resource utilization with high execution speed. The experimental results prove the efficiency of FPGA-based cost-effective solutions that offer superior performance with better output quality.

Finite control set model predictive direct current control strategy with constraints applying to drive three-phase induction motor

In this, work the finite control set (FCS) model predictive direct current control strategy with constraints, is applied to drive three-phase induction motor (IM) using the well-known field-oriented control. As a modern algorithm approach of control, this kind of algorithm decides the suitable switching combination that brings the error between the desired command currents and the predicated currents, as low as possible, according to the process of optimization. The suggested algorithm simulates the constraints of maximum allowable current and the accepted deviation, between the desired command and actual currents. The new constraints produce an improvement in system performance, with the predefined error threshold. This can be applied by avoiding the switching combination that exceeds the limited values. The additional constraints are more suitable for loads that require minimum distortion in harmonic and offer protection from maximum allowable currents. This approach is valuable especially in electrical vehicle (EV) applications since its result offers more reliable system performance with low total harmonics distortion (THD), low motor torque ripple, and better speed tracking.