interconnect circuits Latest Research Papers

Numerical Simulation of Optimizing Plating Uniformity of Interconnect Circuits on Printed Circuit Boards

Journal of Physics Conference Series ◽

10.1088/1742-6596/1986/1/012135 ◽

2021 ◽

Vol 1986 (1) ◽

pp. 012135

Author(s):

Jing Xiang ◽

Panfeng Chen ◽

Yingjie Wang ◽

Chong Zeng ◽

Wenyao Yang ◽

...

Keyword(s):

Numerical Simulation ◽

Printed Circuit Boards ◽

Circuit Boards ◽

Printed Circuit ◽

Interconnect Circuits

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Using Strictly Dissipative Impedance Coupling in the Waveform Relaxation Method for the Analysis of Interconnect Circuits

IEEE Transactions on Circuits and Systems I Regular Papers ◽

10.1109/tcsi.2020.3046948 ◽

2021 ◽

pp. 1-14

Author(s):

Tarik Menkad ◽

Anestis Dounavis

Keyword(s):

Relaxation Method ◽

Waveform Relaxation ◽

Waveform Relaxation Method ◽

Interconnect Circuits

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25.9 Reconfigurable Transient Current-Mode Global Interconnect Circuits in 10nm CMOS for High-Performance Processors with Wide Voltage-Frequency Operating Range

2020 IEEE International Solid- State Circuits Conference - (ISSCC) ◽

10.1109/isscc19947.2020.9063158 ◽

2020 ◽

Author(s):

Mark A. Anders ◽

Himanshu Kaul ◽

Seongjong Kim ◽

Gregory K. Chen ◽

Raghavan Kumar ◽

...

Keyword(s):

High Performance ◽

Current Mode ◽

Transient Current ◽

Operating Range ◽

Voltage Frequency ◽

Global Interconnect ◽

Interconnect Circuits

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Research on Area Modeling Methodology for FPGA Interconnect Circuits

2019 IEEE 13th International Conference on ASIC (ASICON) ◽

10.1109/asicon47005.2019.8983580 ◽

2019 ◽

Author(s):

Yunbing Pang ◽

Jiqing Xu ◽

Zhiyin Lu ◽

Zhengjie Li ◽

Yufan Zhang ◽

...

Keyword(s):

Modeling Methodology ◽

Interconnect Circuits

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An Automatic Transistor-Level Tool for GRM FPGA Interconnect Circuits Optimization

Proceedings of the 2019 on Great Lakes Symposium on VLSI - GLSVLSI '19 ◽

10.1145/3299874.3318003 ◽

2019 ◽

Author(s):

Zhengjie Li ◽

Yuanlong Xiao ◽

Yufan Zhang ◽

Yunbing Pang ◽

Chengyu Hu ◽

...

Keyword(s):

Interconnect Circuits

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Transistor-Level Optimization Methodology for GRM FPGA Interconnect Circuits

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays ◽

10.1145/3289602.3293955 ◽

2019 ◽

Author(s):

Zhengjie Li ◽

Yuanlong Xiao ◽

Yufan Zhang ◽

Yunbing Pang ◽

Jian Wang ◽

...

Keyword(s):

Optimization Methodology ◽

Interconnect Circuits

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Parametric Order Reduction of Nonuniform Interconnect Circuits Using Integrated Congruence Transform

IEEE Transactions on Components Packaging and Manufacturing Technology ◽

10.1109/tcpmt.2018.2841372 ◽

2018 ◽

Vol 8 (11) ◽

pp. 1956-1966

Author(s):

Mina A. Farhan ◽

Michel S. Nakhla

Keyword(s):

Order Reduction ◽

Interconnect Circuits

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Research on Circuit-Level Design of High Performance and Low Power FPGA Interconnect Circuits in 28nm Process

2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT) ◽

10.1109/icsict.2018.8564894 ◽

2018 ◽

Cited By ~ 1

Author(s):

Yunbing Pang ◽

Jiqing Xu ◽

Yufan Zhang ◽

Xinxuan Tao ◽

Jian Wang ◽

...

Keyword(s):

Low Power ◽

High Performance ◽

Level Design ◽

Interconnect Circuits

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Electrically driven monolithic subwavelength plasmonic interconnect circuits

Science Advances ◽

10.1126/sciadv.1701456 ◽

2017 ◽

Vol 3 (10) ◽

pp. e1701456 ◽

Cited By ~ 15

Author(s):

Yang Liu ◽

Jiasen Zhang ◽

Huaping Liu ◽

Sheng Wang ◽

Lian-Mao Peng

Keyword(s):

Interconnect Circuits

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Resistive Coupling-Based Waveform Relaxation Algorithm for Analysis of Interconnect Circuits

IEEE Transactions on Circuits and Systems I Regular Papers ◽

10.1109/tcsi.2017.2665973 ◽

2017 ◽

Vol 64 (7) ◽

pp. 1877-1890 ◽

Cited By ~ 1

Author(s):

Tarik Menkad ◽

Anestis Dounavis

Keyword(s):

Waveform Relaxation ◽

Relaxation Algorithm ◽

Interconnect Circuits

Download Full-text

interconnect circuits
Recently Published Documents

TOTAL DOCUMENTS

H-INDEX

Numerical Simulation of Optimizing Plating Uniformity of Interconnect Circuits on Printed Circuit Boards

Using Strictly Dissipative Impedance Coupling in the Waveform Relaxation Method for the Analysis of Interconnect Circuits

25.9 Reconfigurable Transient Current-Mode Global Interconnect Circuits in 10nm CMOS for High-Performance Processors with Wide Voltage-Frequency Operating Range

Research on Area Modeling Methodology for FPGA Interconnect Circuits

An Automatic Transistor-Level Tool for GRM FPGA Interconnect Circuits Optimization

Transistor-Level Optimization Methodology for GRM FPGA Interconnect Circuits

Parametric Order Reduction of Nonuniform Interconnect Circuits Using Integrated Congruence Transform

Research on Circuit-Level Design of High Performance and Low Power FPGA Interconnect Circuits in 28nm Process

Electrically driven monolithic subwavelength plasmonic interconnect circuits

Resistive Coupling-Based Waveform Relaxation Algorithm for Analysis of Interconnect Circuits

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interconnect circuitsRecently Published Documents

TOTAL DOCUMENTS

H-INDEX

Numerical Simulation of Optimizing Plating Uniformity of Interconnect Circuits on Printed Circuit Boards

Using Strictly Dissipative Impedance Coupling in the Waveform Relaxation Method for the Analysis of Interconnect Circuits

25.9 Reconfigurable Transient Current-Mode Global Interconnect Circuits in 10nm CMOS for High-Performance Processors with Wide Voltage-Frequency Operating Range

Research on Area Modeling Methodology for FPGA Interconnect Circuits

An Automatic Transistor-Level Tool for GRM FPGA Interconnect Circuits Optimization

Transistor-Level Optimization Methodology for GRM FPGA Interconnect Circuits

Parametric Order Reduction of Nonuniform Interconnect Circuits Using Integrated Congruence Transform

Research on Circuit-Level Design of High Performance and Low Power FPGA Interconnect Circuits in 28nm Process

Electrically driven monolithic subwavelength plasmonic interconnect circuits

Resistive Coupling-Based Waveform Relaxation Algorithm for Analysis of Interconnect Circuits

interconnect circuits
Recently Published Documents