An improvement and a fast DSP implementation of the bit flipping algorithms for low density parity check decoder

<span lang="EN-US">For low density parity check (LDPC) decoding, hard-decision algorithms are sometimes more suitable than the soft-decision ones. Particularly in the high throughput and high speed applications. However, there exists a considerable gap in performances between these two classes of algorithms in favor of soft-decision algorithms. In order to reduce this gap, in this work we introduce two new improved versions of the hard-decision algorithms, the adaptative gradient descent bit-flipping (AGDBF) and adaptative reliability ratio weighted GDBF (ARRWGDBF). An adaptative weighting and correction factor is introduced in each case to improve the performances of the two algorithms allowing an important gain of bit error rate. As a second contribution of this work a real time implementation of the proposed solutions on a digital signal processors (DSP) is performed in order to optimize and improve the performance of these new approchs. The results of numerical simulations and DSP implementation reveal a faster convergence with a low processing time and a reduction in consumed memory resources when compared to soft-decision algorithms. For the irregular LDPC code, our approachs achieves gains of 0.25 and 0.15 dB respectively for the AGDBF and ARRWGDBF algorithms.</span>

Hybrid nonlinear control strategies for performance enhancement of a doubly-fed induction aero-generator: design and DSP implementation

This paper reports on the design and implementation in DSP as hardware in the loop of a nonlinear control strategy for a grid-connected variable speed wind turbine using a doubly fed induction generator (DFIG). The objective of this work is to build a real-time nonlinear hybrid approach combining Backstepping control and sliding mode control strategies for DFIG used in wind energy conversion systems (WECS). The results of the DSP implementation are discussed and qualitative and quantitative performance evaluations are performed under various disturbed conditions. The implementation is performed using the TMS320F28335 DSP combined with the MATLAB/Simulink (2016a) environment. The experimental results have been satisfactorily achieved, which implies that the proposed strategy is an efficient and robust approach to monitor the WECS.

Characteristic Analysis of Fractional-Order Memristor-Based Hypogenetic Jerk System and Its DSP Implementation

In this paper, a fractional-order memristive model with infinite coexisting attractors is investigated. The numerical solution of the system is derived based on the Adomian decomposition method (ADM), and its dynamic behaviors are analyzed by means of phase diagrams, bifurcation diagrams, Lyapunov exponent spectrum (LEs), dynamic map based on SE complexity and maximum Lyapunov exponent (MLE). Simulation results show that it has rich dynamic characteristics, including asymmetric coexisting attractors with different structures and offset boosting. Finally, the digital signal processor (DSP) implementation verifies the correctness of the solution algorithm and the physical feasibility of the system.