twisted edwards curve
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Author(s):  
Mrs. Lakshmidevi TR ◽  
Ms. Kavana Shree C ◽  
Ms. Arshitha S ◽  
Ms. Kavya L

Creating a high-speed elliptic curve cryptographic (ECC) processor capable of performing fast point Multiplication with low hardware utilisation is a critical requirement in cryptography and network security. This paper describes the implementation of a high-speed, field-programmable gate array (FPGA) in this paper. A high-security digital signature technique is implemented using Edwards25519, a recently approved twisted Edwards’s curve. For point addition and point doubling operations on the twisted Edwards curve, advanced hardware configurations are developed in which each task involves only 516 and 1029 clock cycles, respectively. As an observation the ECC processor presented in this paper begins with the process which takes 1.48 ms of single-point multiplication to be performed. The comparison of key size and its ratio which shows the impact on processing of each processor is shown for ECC processor and RSA processor. The delay and number of slices used for the ECC processor is shown and this is a developed solution saves time by providing rapid scalar multiplication with low hardware consumption without compromising on security.


2021 ◽  
Vol 19 ◽  
pp. 709-722
Author(s):  
Ruslan Skuratovskii ◽  
Volodymyr Osadchyy

We consider the algebraic affine and projective curves of Edwards over the finite field Fpn. It is well known that many modern cryptosystems can be naturally transformed into elliptic curves. The criterions of the supersingularity of Montgomery and Edwards curves are found. In this paper, we extend our previous research into those Edwards algebraic curves over a finite field and we construct birational isomorphism of them with cubic in Weierstrass normal form. One class of twisted Edwards is researched too. We propose a novel effective method of point counting for both Edwards and elliptic curves. In addition to finding a specific set of coefficients with corresponding field characteristics for which these curves are supersingular, we also find a general formula by which one can determine whether or not a curve Ed[Fp] is supersingular over this field. The method proposed has complexity O( p log2 2 p ) . This is an improvement over both Schoof’s basic algorithm and the variant which makes use of fast arithmetic (suitable for only the Elkis or Atkin primes numbers) with complexities O(log8 2 pn) and O(log4 2 pn) respectively. The embedding degree of the supersingular curve of Edwards over Fpn in a finite field is additionally investigated. Singular points of twisted Edwards curve are completely described. Due existing the birational isomorphism between twisted Edwards curve and elliptic curve in Weierstrass normal form the result about order of this curve over finite field is extended on cubic in Weierstrass normal form. Also it is considered minimum degree of an isogeny (distance) between curves of this two classes when such isogeny exists. We extend the existing isogenous of elliptic curves.


Sensors ◽  
2020 ◽  
Vol 20 (18) ◽  
pp. 5148
Author(s):  
Md. Mainul Islam ◽  
Md. Selim Hossain ◽  
Moh. Khalid Hasan ◽  
Md. Shahjalal ◽  
Yeong Min Jang

With the swift evolution of wireless technologies, the demand for the Internet of Things (IoT) security is rising immensely. Elliptic curve cryptography (ECC) provides an attractive solution to fulfill this demand. In recent years, Edwards curves have gained widespread acceptance in digital signatures and ECC due to their faster group operations and higher resistance against side-channel attacks (SCAs) than that of the Weierstrass form of elliptic curves. In this paper, we propose a high-speed, low-area, simple power analysis (SPA)-resistant field-programmable gate array (FPGA) implementation of ECC processor with unified point addition on a twisted Edwards curve, namely Edwards25519. Efficient hardware architectures for modular multiplication, modular inversion, unified point addition, and elliptic curve point multiplication (ECPM) are proposed. To reduce the computational complexity of ECPM, the ECPM scheme is designed in projective coordinates instead of affine coordinates. The proposed ECC processor performs 256-bit point multiplication over a prime field in 198,715 clock cycles and takes 1.9 ms with a throughput of 134.5 kbps, occupying only 6543 slices on Xilinx Virtex-7 FPGA platform. It supports high-speed public-key generation using fewer hardware resources without compromising the security level, which is a challenging requirement for IoT security.


Author(s):  
Meryem Cherkaoui Semmouni ◽  
Abderrahmane Nitaj ◽  
Mostafa Belkasmi

2017 ◽  
Vol 4 (60) ◽  
Author(s):  
Р. В. Скуратовський ◽  
А. С. Дудник ◽  
Д. М. Квашук

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