special processor
Recently Published Documents


TOTAL DOCUMENTS

19
(FIVE YEARS 5)

H-INDEX

1
(FIVE YEARS 0)

TEM Journal ◽  
2020 ◽  
pp. 501-506
Author(s):  
Adeliya Yu. Burova ◽  
Timur O. Usatenko

The issues related to the problem of minimizing hardware costs in the digital algorithms’ hardware and software implementation for the discrete signals’ frequency selection on programmable logic devices (PLD) and special processor microelectronic devices are considered. Possible ways to solve these problems are described based on the computational algorithms for non-recursive digital filtering (NDF) and difference digital filtering with integer coefficients use. A necessary and sufficient condition is given for using a computational algorithm’s hardware and software implementation of discrete signals’ difference digital filtering for their multi-stage discrete Fourier transform without performing arithmetic multiplication operations.


2019 ◽  
Vol 2019 (3) ◽  
pp. 65-70
Author(s):  
Алексей Кожевников ◽  
Aleksey Kozhevnikov

The application of the systems of residual classes (SRC) allows carrying out arithmetic operations of addition and multiplication more efficiently which are basic in DSP at the expense of small digit capacity of deductions. An additional growth of an operating speed gives a transition from a digital processing to a tone one, that is, to number encoding in the SRC by discrete phases of tone signals of one frequency. The application of an instrumentation framework on the superconductor basis shows an outlook of the special processor formation on the basis of principles marked earlier with the productivity of a subtherahertz order. If a mathematical expression for a signal processing is rigidly specified and contains a constant k which does not need to vary, then in the special processor structure a tone multiplication of a number by a constant through a module may be carried out as a serial addition of an operand with itself. If a special processor work needs sometimes a program reconstruction of system constant parameters, then it is possible to carry out on the basis of other multiplication device by a constant. A tone multiplication of two numbers by a module is formed through a simplest algorithm consisting in a serial addi-tion through a module of the first operand with itself and a choice of the result required through the second operand. The multiplication fulfillment through a mod-ule in a tone form in different versions is possible that enables unique possibilities of signal processing on the basis of the wellknown DSP methods with an operation speed which is a record for these algorithms.


Author(s):  
Taras Grinchyshyn ◽  
Nadyia Sagan

The theoretical basics of data-free encoding of data based on recurrent GK-codes are presented, analysis and comparison of existing coding methods and their protocols with the proposed method, the principle of GK-codes formation based on Galois code sequence and transmission of coded data-free data are substantiated. The theoretical foundations and principles of signaling codes used to manipulate bit-oriented data streams in computer system information channels are proposed, taking into account the extent of signal space utilization and signal shape, the rate of message transmission and the degree of error protection. The RSSC provides effective symmetric coding in the form of Galois codes of sequences of zeros and units of a data block, with unambiguous determination of their number that can be used to detect and correct errors after data transmission on computer systems. A special feature of the structure of this special processor is the symmetrical formation of Galois data bit signs. Moreover, the start of the Galois generator occurs according to the appearance of the first bit of zero or one in the data stream. New methods of signal-free bit encoding of bit-oriented information flows using Galois field codes have been proposed, which enable the detection and correction of one-time errors without inputting excess data streams transmitted in an optical channel. Formalization of functional structures of modules of processors of formation of hopeless codes has been formalized, as well as structures of special processors and their components have been developed, which perform the formation of Galois signal corrective codes and implement their algorithmic modeling.


Author(s):  
О. P. Liura ◽  
N. Ya. Vozna ◽  
Ya. M. Nykolaichuk

The fast-acting algorithms of exposure and invariant authentication of transients in the lines of electricity transmission as load surge, short circuits and start of powerful electric engines were developed; based on that, the functions of relay defense device of high-voltage lines of electricity transmission were determined. The given structure of small, microelectronic fast-acting device of relay defense is with the extended functional possibilities of recognition of load surge and defense of high-voltage lines of electricity transmission from short circuits, the syntax of his functions was presented. This device can be used for load surge recognition and short circuits, invariant to the size of increase currents in the separate phases of electric lines. It allowed successful application of the developed method and device for simultaneous recognition of load surge, short circuits and starting of powerful electric engines. The information technology of designing structural solutions of relay protection special processor for high-voltage electricity transmission lines was presented.


Sign in / Sign up

Export Citation Format

Share Document