The methodology of synthesis of dynamically reconfigurable computing systems with temporal partitioning of homogeneous resources

The main motivation factors for the proposed research were the increase of cost-efficiency of FPGA based systems and the simplification of the design process. The first factor is optimization of design in multi-parametric constraint space. The second factor is the design of reconfigurable systems based on higher level of abstraction in a form of macro-functions rather than conventional HDL primitives. Main goal of this work was to create a methodology for automated cost-effective design synthesis of FPGA systems by utilizing temporal partitioning concept. Temporal partitioning provides powerful mechanism that allows to design cost-effective multi-parametrically optimized architectures. Another feature of these architectures is the ability for run-time self-restoration from hardware faults. As the result of the proposed research this methodology was created and successfully verified on the first prototype of Multi-mode Adaptive Reconfigurable System (MARS) with embedded Temporal Partitioning Mechanism (TPM). A special CAD software system was developed for automated application programming, automated task segmentation, and further high-level synthesis of segment specific processors (SSPs). Several novel methodologies were proposed, developed, and verified including: a methodology for creation of macro-operators (MOs) and associated set of optimized virtual hardware components (VHCs); an automated task segmentation methodology and synthesis of segment specific processors from the VHCs; methodology for integration of fault tolerance mechanisms with the self-restoration capability. The latter mechanism made possible the mitigation of transient and permanent hardware faults in run-time. The proof-of-concept component of this research consists of implementation of the above methodologies and mechanisms in the special software CAD system and verification on the experimental setup based on the prototype of system with TPM (MARS platform). As the result, all the developed methodologies and architectural solutions were tested and their effectiveness was demonstrated.

The methodology of synthesis of dynamically reconfigurable computing systems with temporal partitioning of homogeneous resources

The main motivation factors for the proposed research were the increase of cost-efficiency of FPGA based systems and the simplification of the design process. The first factor is optimization of design in multi-parametric constraint space. The second factor is the design of reconfigurable systems based on higher level of abstraction in a form of macro-functions rather than conventional HDL primitives. Main goal of this work was to create a methodology for automated cost-effective design synthesis of FPGA systems by utilizing temporal partitioning concept. Temporal partitioning provides powerful mechanism that allows to design cost-effective multi-parametrically optimized architectures. Another feature of these architectures is the ability for run-time self-restoration from hardware faults. As the result of the proposed research this methodology was created and successfully verified on the first prototype of Multi-mode Adaptive Reconfigurable System (MARS) with embedded Temporal Partitioning Mechanism (TPM). A special CAD software system was developed for automated application programming, automated task segmentation, and further high-level synthesis of segment specific processors (SSPs). Several novel methodologies were proposed, developed, and verified including: a methodology for creation of macro-operators (MOs) and associated set of optimized virtual hardware components (VHCs); an automated task segmentation methodology and synthesis of segment specific processors from the VHCs; methodology for integration of fault tolerance mechanisms with the self-restoration capability. The latter mechanism made possible the mitigation of transient and permanent hardware faults in run-time. The proof-of-concept component of this research consists of implementation of the above methodologies and mechanisms in the special software CAD system and verification on the experimental setup based on the prototype of system with TPM (MARS platform). As the result, all the developed methodologies and architectural solutions were tested and their effectiveness was demonstrated.

Exploring the symbol processing ‘time interval’ parametric constraint in a Belousov–Zhabotinsky operated chemical Turing machine

Chemical reactions are powerful molecular recognition machines.

A Comparative Study Of Tolerance Analysis Methods

This paper reviews four major methods for tolerance analysis and compares them. The methods discussed are: (1) one-dimensional tolerance charts; (2) parametric tolerance analysis, especially parametric analysis based on the Monte Carlo simulation; (3) vector loop (or kinematic) based tolerance analysis; and (4) ASU Tolerance-Map® (T-Map®) (Patent pending; nonprovisional patent application number: 09/507, 542 (2002)) based tolerance analysis. Tolerance charts deal with worst-case tolerance analysis in one direction at a time and ignore possible contributions from the other directions. Manual charting is tedious and error prone, hence, attempts have been made for automation. The parametric approach to tolerance analysis is based on parametric constraint solving; its inherent drawback is that the accuracy of the simulation results are dependent on the user-defined modeling scheme, and its inability to incorporate all Y14.5 rules. The vector loop method uses kinematic joints to model assembly constraints. It is also not fully consistent with Y14.5 standard. The ASU T-Map® based tolerance analysis method can model geometric tolerances and their interaction in truly three-dimensional context. It is completely consistent with Y14.5 standard but its use by designers may be quite challenging. The T-Map® based tolerance analysis method is still under development. Despite the shortcomings of each of these tolerance analysis methods, each may be used to provide reasonable results under certain circumstances. Through a comprehensive comparison of these methods, this paper will offer some recommendations for selecting the best method to use for a given tolerance accumulation problem.

Approximate Motion Synthesis of Open and Closed Chains via Parametric Constraint Manifold Fitting: Preliminary Results

In this paper we present a novel dyad dimensional synthesis technique for approximate motion synthesis. The methodology utilizes an analytic representation of the dyad’s constraint manifold that is parameterized by its dimensional synthesis variables. Nonlinear optimization techniques are then employed to minimize the distance from the dyad’s constraint manifold to a finite number of desired locations of the workpiece. The result is an approximate motion dimensional synthesis technique that is applicable to planar, spherical, and spatial dyads. Here, we specifically address the planar RR, spherical RR and spatial CC dyads since these are often found in the kinematic structure of robotic systems and mechanisms. These dyads may be combined serially to form a complex open chain (e.g. a robot) or when connected back to the fixed link they may be joined so as to form one or more closed chains (e.g. a linkage, a parallel mechanism, or a platform). Finally, we present some initial numerical design case studies that demonstrate the utility of the synthesis technique.