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IEEE International Workshop on Memory Technology, Design and Testing,
Latest Publications
TOTAL DOCUMENTS
22
(FIVE YEARS 0)
H-INDEX
4
(FIVE YEARS 0)
Published By IEEE
0818674660
Latest Documents
Most Cited Documents
Contributed Authors
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Related Keywords
Latest Documents
Most Cited Documents
Contributed Authors
Related Sources
Related Keywords
Methods for memory test time reduction
IEEE International Workshop on Memory Technology, Design and Testing,
◽
10.1109/mtdt.1996.782494
◽
2005
◽
Cited By ~ 1
Author(s):
Wen-Jer Wu
◽
Chuan Yi Tang
◽
M.Y. Lin
Keyword(s):
Memory Test
◽
Test Time
◽
Test Time Reduction
◽
Time Reduction
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A synthesizable ram bist circuit for applying an O(n log/sub 2/ n) test that detects scrambled static pattern-sensitive faults
IEEE International Workshop on Memory Technology, Design and Testing,
◽
10.1109/mtdt.1996.782493
◽
2005
◽
Cited By ~ 5
Author(s):
B.F. Cockburn
◽
D.P. Sarda
Keyword(s):
Pattern Sensitive Faults
◽
Static Pattern
Download Full-text
Giga-bit DRAM trend
IEEE International Workshop on Memory Technology, Design and Testing,
◽
10.1109/mtdt.1996.782490
◽
2005
◽
Author(s):
T. Furuyama
Download Full-text
Flash memory quality and reliability issues
IEEE International Workshop on Memory Technology, Design and Testing,
◽
10.1109/mtdt.1996.782488
◽
2005
◽
Cited By ~ 4
Author(s):
R. Verma
Keyword(s):
Flash Memory
◽
Quality And Reliability
Download Full-text
Unexpected charge losses from the floating gates of eeprom memory cells
IEEE International Workshop on Memory Technology, Design and Testing,
◽
10.1109/mtdt.1996.782498
◽
2005
◽
Cited By ~ 2
Author(s):
R. Allinger
◽
M. Kerber
◽
H.J. Mattausch
◽
H. Braun
Keyword(s):
Memory Cells
◽
Floating Gates
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Flash memory technology - a review
IEEE International Workshop on Memory Technology, Design and Testing,
◽
10.1109/mtdt.1996.782491
◽
2005
◽
Author(s):
K. Rajkanan
Keyword(s):
Flash Memory
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Rambist builder: a methodology for automatic built-in self-test design of embedded rams
IEEE International Workshop on Memory Technology, Design and Testing,
◽
10.1109/mtdt.1996.782492
◽
2005
◽
Cited By ~ 14
Author(s):
R. Rajsuman
Keyword(s):
Test Design
◽
Self Test
◽
Built In Self Test
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Scanning capacitance microscopy analysis of dram trench capacitors
IEEE International Workshop on Memory Technology, Design and Testing,
◽
10.1109/mtdt.1996.782496
◽
2005
◽
Cited By ~ 3
Author(s):
K.L. Pey
◽
Y.E. Strausser
◽
A.N. Erickson
◽
A.J. Leslie
◽
M.T.F. Beh
◽
...
Keyword(s):
Scanning Capacitance Microscopy
◽
Microscopy Analysis
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A low power current sensing scheme for cmos sram
IEEE International Workshop on Memory Technology, Design and Testing,
◽
10.1109/mtdt.1996.782489
◽
2005
◽
Cited By ~ 4
Author(s):
H. Wang
◽
P.C. Liu
Keyword(s):
Low Power
◽
Current Sensing
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Design and analysis of a synchronous dram memory module
IEEE International Workshop on Memory Technology, Design and Testing,
◽
10.1109/mtdt.1996.782495
◽
2005
◽
Author(s):
G. Ley
◽
D. Phipps
Keyword(s):
Memory Module
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