submicron cmos Latest Research Papers

Analysis of Static Power Reduction Strategies in Deep Submicron CMOS Device Technology for Digital Circuits

10.1109/ispcc53510.2021.9609444 ◽

2021 ◽

Author(s):

G. Munirathnam ◽

Y. Murali Mohan Babu

Keyword(s):

Digital Circuits ◽

Deep Submicron ◽

Power Reduction ◽

Reduction Strategies ◽

Static Power ◽

Submicron Cmos ◽

Device Technology

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Low-Power Deep-Submicron CMOS Adder Using Optimized Delay Universal Gates

Advances in Automation, Signal Processing, Instrumentation, and Control - Lecture Notes in Electrical Engineering ◽

10.1007/978-981-15-8221-9_47 ◽

2021 ◽

pp. 531-549

Author(s):

J. Jeba Johannah ◽

Reeba Korah ◽

G. Maria Kalavathy

Keyword(s):

Low Power ◽

Deep Submicron ◽

Submicron Cmos ◽

Universal Gates

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Modelling and Design of 5T, 6T and 7T SRAM Cell Using Deep Submicron CMOS Technology

Algorithms for Intelligent Systems - Proceedings of Second International Conference on Smart Energy and Communication ◽

10.1007/978-981-15-6707-0_28 ◽

2021 ◽

pp. 305-309

Author(s):

Nidhi Tiwari ◽

Varun Sankath ◽

Akhilesh Upadhyay ◽

Mukesh Yadav ◽

Ruby Jain ◽

...

Keyword(s):

Cmos Technology ◽

Deep Submicron ◽

Sram Cell ◽

Submicron Cmos

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Analysis of SRAM bit cell topologies in submicron CMOS technology

International Journal of Simulation Systems Science & Technology ◽

10.5013/ijssst.a.16.06.13 ◽

2020 ◽

Author(s):

Vipul Bhatnagar ◽

Pradeep Kumar ◽

Sujata Pandey

Keyword(s):

Cmos Technology ◽

Submicron Cmos

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Modeling of the submicron CMOS differential ring oscillator for obtaining an equation for the output frequency

Circuits Systems and Signal Processing ◽

10.1007/s00034-020-01547-y ◽

2020 ◽

Author(s):

Aravinda Koithyar ◽

T. K. Ramesh

Keyword(s):

Ring Oscillator ◽

Output Frequency ◽

Differential Ring ◽

Submicron Cmos

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Highest Maximum Power Point of Radially Distant Inductively Coupled Power Receivers With Deep Submicron CMOS

IEEE Transactions on Industrial Informatics ◽

10.1109/tii.2019.2910092 ◽

2020 ◽

Vol 16 (2) ◽

pp. 1086-1093 ◽

Cited By ~ 1

Author(s):

Nan Xing ◽

Gabriel A. Rincon-Mora

Keyword(s):

Deep Submicron ◽

Maximum Power ◽

Maximum Power Point ◽

Inductively Coupled ◽

Submicron Cmos ◽

Power Point

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Towards a deep submicron CMOS image sensor on a standard FDSOI process

SPIE Micro + Nano Materials, Devices, and Applications 2019 ◽

10.1117/12.2541223 ◽

2019 ◽

Author(s):

Paul Beckett ◽

Ranjith Rajasekharan Unnithan

Keyword(s):

Cmos Image Sensor ◽

Image Sensor ◽

Deep Submicron ◽

Submicron Cmos

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Electrical Performance and Reliability Aspects of Strain Engineered Deep Submicron CMOS Technologies

ECS Transactions ◽

10.1149/1.2767280 ◽

2019 ◽

Vol 8 (1) ◽

pp. 15-22

Author(s):

Cor Claeys ◽

Geert Eneman ◽

Mireia Bargallo Gonzalez ◽

Sofie Put ◽

Eddy Simoen

Keyword(s):

Deep Submicron ◽

Electrical Performance ◽

Submicron Cmos

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Impact of Radiation on the Operation and Reliability of Deep Submicron CMOS Technologies

ECS Transactions ◽

10.1149/1.3360593 ◽

2019 ◽

Vol 27 (1) ◽

pp. 39-46 ◽

Cited By ~ 2

Author(s):

Cor Claeys ◽

Sofie Put ◽

Alessio Griffoni ◽

Andrea Cester ◽

Simone Gerardin ◽

...

Keyword(s):

Deep Submicron ◽

Submicron Cmos

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Perimeter Gated Single Photon Avalanche Diodes in Sub-Micron and Deep-Submicron CMOS Processes

Selected Topics in Electronics and Systems - High Performance Logic and Circuits for High-Speed Electronic Systems ◽

10.1142/9789811208447_0005 ◽

2019 ◽

pp. 71-89

Author(s):

Mst Shamim Ara Shawkat ◽

Mohammad Habib Ullah Habib ◽

Md Sakib Hasan ◽

Mohammad Aminul Haque ◽

Nicole McFarlane

Keyword(s):

Single Photon ◽

Deep Submicron ◽

Avalanche Diodes ◽

Submicron Cmos ◽

Cmos Processes ◽

Single Photon Avalanche Diodes

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submicron cmos
Recently Published Documents

TOTAL DOCUMENTS

H-INDEX

Analysis of Static Power Reduction Strategies in Deep Submicron CMOS Device Technology for Digital Circuits

Low-Power Deep-Submicron CMOS Adder Using Optimized Delay Universal Gates

Modelling and Design of 5T, 6T and 7T SRAM Cell Using Deep Submicron CMOS Technology

Analysis of SRAM bit cell topologies in submicron CMOS technology

Modeling of the submicron CMOS differential ring oscillator for obtaining an equation for the output frequency

Highest Maximum Power Point of Radially Distant Inductively Coupled Power Receivers With Deep Submicron CMOS

Towards a deep submicron CMOS image sensor on a standard FDSOI process

Electrical Performance and Reliability Aspects of Strain Engineered Deep Submicron CMOS Technologies

Impact of Radiation on the Operation and Reliability of Deep Submicron CMOS Technologies

Perimeter Gated Single Photon Avalanche Diodes in Sub-Micron and Deep-Submicron CMOS Processes

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submicron cmosRecently Published Documents

TOTAL DOCUMENTS

H-INDEX

Analysis of Static Power Reduction Strategies in Deep Submicron CMOS Device Technology for Digital Circuits

Low-Power Deep-Submicron CMOS Adder Using Optimized Delay Universal Gates

Modelling and Design of 5T, 6T and 7T SRAM Cell Using Deep Submicron CMOS Technology

Analysis of SRAM bit cell topologies in submicron CMOS technology

Modeling of the submicron CMOS differential ring oscillator for obtaining an equation for the output frequency

Highest Maximum Power Point of Radially Distant Inductively Coupled Power Receivers With Deep Submicron CMOS

Towards a deep submicron CMOS image sensor on a standard FDSOI process

Electrical Performance and Reliability Aspects of Strain Engineered Deep Submicron CMOS Technologies

Impact of Radiation on the Operation and Reliability of Deep Submicron CMOS Technologies

Perimeter Gated Single Photon Avalanche Diodes in Sub-Micron and Deep-Submicron CMOS Processes

submicron cmos
Recently Published Documents