Field-Programmable Logic and Applications - Lecture Notes in Computer Science
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Published By Springer Berlin Heidelberg

9783540424994, 9783540446873

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Implementation of (Normalised) RLS Lattice on Virtex

Field-Programmable Logic and Applications - Lecture Notes in Computer Science ◽

10.1007/3-540-44687-7_10 ◽

2001 ◽

pp. 91-100 ◽

Cited By ~ 5

Author(s):

Felix Albu ◽

Jiri Kadlec ◽

Chris Softley ◽

Rudolf Matousek ◽

Antonin Hermanek ◽

...

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Real Time Morphological Image Contrast Enhancement in Virtex FPGA

Field-Programmable Logic and Applications - Lecture Notes in Computer Science ◽

10.1007/3-540-44687-7_44 ◽

2001 ◽

pp. 430-440 ◽

Cited By ~ 2

Author(s):

Jerzy Kasperek

Keyword(s):

Contrast Enhancement ◽

Real Time ◽

Image Contrast ◽

Image Contrast Enhancement ◽

Morphological Image

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A Digit-Serial Structure for Reconfigurable Multipliers

Field-Programmable Logic and Applications - Lecture Notes in Computer Science ◽

10.1007/3-540-44687-7_58 ◽

2001 ◽

pp. 565-573 ◽

Cited By ~ 2

Author(s):

Chakkapas Visavakul ◽

Peter Y. K. Cheung ◽

Wayne Luk

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A Data Re-use Based Compiler Optimization for FPGAs

Field-Programmable Logic and Applications - Lecture Notes in Computer Science ◽

10.1007/3-540-44687-7_72 ◽

2001 ◽

pp. 648-652

Author(s):

Ram Subramanian ◽

Santosh Pande

Keyword(s):

Compiler Optimization

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Hardware-Software Partitioning: A Reconfigurable and Evolutionary Computing Approach

Field-Programmable Logic and Applications - Lecture Notes in Computer Science ◽

10.1007/3-540-44687-7_62 ◽

2001 ◽

pp. 595-600

Author(s):

Jim Harkin ◽

Thomas M. McGinnity ◽

Liam P. Maguire

Keyword(s):

Evolutionary Computing ◽

Computing Approach ◽

Software Partitioning

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Dynamically Reconfigurable Cores

Field-Programmable Logic and Applications - Lecture Notes in Computer Science ◽

10.1007/3-540-44687-7_48 ◽

2001 ◽

pp. 462-472 ◽

Cited By ~ 8

Author(s):

John MacBeth ◽

Patrick Lysaght

Keyword(s):

Dynamically Reconfigurable

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Evaluation of an FPGA Implementation of the Discrete Element Method

Field-Programmable Logic and Applications - Lecture Notes in Computer Science ◽

10.1007/3-540-44687-7_32 ◽

2001 ◽

pp. 306-314 ◽

Cited By ~ 2

Author(s):

Benjamin Carrion Schafer ◽

Steven F. Quigley ◽

Andrew H. C. Chan

Keyword(s):

Discrete Element Method ◽

Discrete Element ◽

Fpga Implementation ◽

Element Method

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PuMA++: From Behavioral Specification to Multi-FPGA-Prototype

Field-Programmable Logic and Applications - Lecture Notes in Computer Science ◽

10.1007/3-540-44687-7_14 ◽

2001 ◽

pp. 133-141

Author(s):

Klaus Harbich ◽

Erich Barke

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Demonstrating Real-time JPEG Image Compression-Decompression using Standard Component IP Cores on a Programmable Logic based Platform for DSP and Image Processing

Field-Programmable Logic and Applications - Lecture Notes in Computer Science ◽

10.1007/3-540-44687-7_45 ◽

2001 ◽

pp. 441-450 ◽

Cited By ~ 3

Author(s):

Albert Simpson ◽

Jill Hunter ◽

Moira Wylie ◽

Yi Hu ◽

David Mann

Keyword(s):

Image Processing ◽

Image Compression ◽

Real Time ◽

Programmable Logic ◽

Jpeg Image ◽

Standard Component ◽

Ip Cores ◽

Jpeg Image Compression

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Using Design-Level Scan to Improve FPGA Design Observability and Controllability for Functional Verification

Field-Programmable Logic and Applications - Lecture Notes in Computer Science ◽

10.1007/3-540-44687-7_50 ◽

2001 ◽

pp. 483-492 ◽

Cited By ~ 37

Author(s):

Timothy Wheeler ◽

Paul Graham ◽

Brent Nelson ◽

Brad Hutchings

Keyword(s):

Functional Verification ◽

Fpga Design

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Field-Programmable Logic and Applications - Lecture Notes in Computer ScienceLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer Berlin Heidelberg

Implementation of (Normalised) RLS Lattice on Virtex

Real Time Morphological Image Contrast Enhancement in Virtex FPGA

A Digit-Serial Structure for Reconfigurable Multipliers

A Data Re-use Based Compiler Optimization for FPGAs

Hardware-Software Partitioning: A Reconfigurable and Evolutionary Computing Approach

Dynamically Reconfigurable Cores

Evaluation of an FPGA Implementation of the Discrete Element Method

PuMA++: From Behavioral Specification to Multi-FPGA-Prototype

Demonstrating Real-time JPEG Image Compression-Decompression using Standard Component IP Cores on a Programmable Logic based Platform for DSP and Image Processing

Using Design-Level Scan to Improve FPGA Design Observability and Controllability for Functional Verification

Field-Programmable Logic and Applications - Lecture Notes in Computer Science
Latest Publications