Proceedings of the 14th annual international symposium on Computer architecture - ISCA '87
Latest Publications

TOTAL DOCUMENTS

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By ACM Press

0818607769

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

A modular systolic architecture for image convolutions

Proceedings of the 14th annual international symposium on Computer architecture - ISCA '87 ◽

10.1145/30350.30357 ◽

1987 ◽

Cited By ~ 4

Author(s):

K. Doshi ◽

P. Varman

Keyword(s):

Systolic Architecture

Download Full-text

Performance analysis and design of a logic simulation machine

Proceedings of the 14th annual international symposium on Computer architecture - ISCA '87 ◽

10.1145/30350.30356 ◽

1987 ◽

Cited By ~ 9

Author(s):

K. Wong ◽

M. A. Franklin

Keyword(s):

Performance Analysis ◽

Logic Simulation ◽

Analysis And Design ◽

Performance Analysis And Design

Download Full-text

The hardware architecture of the CRISP microprocessor

Proceedings of the 14th annual international symposium on Computer architecture - ISCA '87 ◽

10.1145/30350.30385 ◽

1987 ◽

Cited By ~ 22

Author(s):

D. R. Ditzel ◽

H. R. McLellan ◽

A. D. Berenbaum

Keyword(s):

Hardware Architecture

Download Full-text

Correct memory operation of cache-based multiprocessors

Proceedings of the 14th annual international symposium on Computer architecture - ISCA '87 ◽

10.1145/30350.30377 ◽

1987 ◽

Cited By ~ 65

Author(s):

C. Scheurich ◽

M. Dubois

Download Full-text

A performance analysis of automatically managed top of stack buffers

Proceedings of the 14th annual international symposium on Computer architecture - ISCA '87 ◽

10.1145/30350.30381 ◽

1987 ◽

Cited By ~ 7

Author(s):

T. J. Stanley ◽

R. G. Wedig

Keyword(s):

Performance Analysis ◽

A Performance

Download Full-text

Performance evaluation of multiple register sets

Proceedings of the 14th annual international symposium on Computer architecture - ISCA '87 ◽

10.1145/30350.30380 ◽

1987 ◽

Cited By ~ 6

Author(s):

R. J. Eickemeyer ◽

J. H. Patel

Keyword(s):

Performance Evaluation

Download Full-text

Performance evaluation of reduced bandwidth multistage interconnection networks

Proceedings of the 14th annual international symposium on Computer architecture - ISCA '87 ◽

10.1145/30350.30370 ◽

1987 ◽

Cited By ~ 1

Author(s):

D. T. Harper ◽

J. R. Jump

Keyword(s):

Performance Evaluation ◽

Interconnection Networks ◽

Multistage Interconnection Networks

Download Full-text

WISQ: a restartable architecture using queues

Proceedings of the 14th annual international symposium on Computer architecture - ISCA '87 ◽

10.1145/30350.30383 ◽

1987 ◽

Cited By ~ 2

Author(s):

A. R. Pleszkun ◽

J. R. Goodman ◽

W. C. Hsu ◽

R. T. Joersz ◽

G. Bier ◽

...

Download Full-text

Mapping data flow programs on a VLSI array of processors

Proceedings of the 14th annual international symposium on Computer architecture - ISCA '87 ◽

10.1145/30350.30359 ◽

1987 ◽

Cited By ~ 12

Author(s):

B. Mendelson ◽

G. M. Silberman

Keyword(s):

Data Flow ◽

Mapping Data ◽

Vlsi Array

Download Full-text

Hardware support for interprocess communication

Proceedings of the 14th annual international symposium on Computer architecture - ISCA '87 ◽

10.1145/30350.30371 ◽

1987 ◽

Cited By ~ 5

Author(s):

U. Ramachandran ◽

M. Solomon ◽

M. Vernon

Keyword(s):

Hardware Support ◽

Interprocess Communication

Download Full-text

Proceedings of the 14th annual international symposium on Computer architecture - ISCA '87Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By ACM Press

A modular systolic architecture for image convolutions

Performance analysis and design of a logic simulation machine

The hardware architecture of the CRISP microprocessor

Correct memory operation of cache-based multiprocessors

A performance analysis of automatically managed top of stack buffers

Performance evaluation of multiple register sets

Performance evaluation of reduced bandwidth multistage interconnection networks

WISQ: a restartable architecture using queues

Mapping data flow programs on a VLSI array of processors

Hardware support for interprocess communication

Proceedings of the 14th annual international symposium on Computer architecture - ISCA '87
Latest Publications