2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC)
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9781479905249

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Software-programmable digital pre-distortion on the Zynq SoC

2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2013.6673292 ◽

2013 ◽

Author(s):

Baris Ozgul ◽

Jan Langer ◽

Juanjo Noguera ◽

Kees Visses

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Low cost FPGA design and implementation of a stereo matching system for 3D-TV applications

2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2013.6673276 ◽

2013 ◽

Cited By ~ 3

Author(s):

Aydin Aysu ◽

Murat Sayinta ◽

Cevahir Cigla

Keyword(s):

Stereo Matching ◽

Low Cost ◽

Fpga Design ◽

Design And Implementation ◽

3D Tv

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PFT — A low overhead predictability enhancement technique for non-preemptive NoCs

2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2013.6673299 ◽

2013 ◽

Cited By ~ 3

Author(s):

Bharath Sudev ◽

Leandro Soares Indrusiak

Keyword(s):

Enhancement Technique

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Analog layer extensions for analog/mixed-signal assertion languages

2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2013.6673252 ◽

2013 ◽

Cited By ~ 1

Author(s):

Dogan Ulus ◽

Alper Sen ◽

Faik Baskaya

Keyword(s):

Mixed Signal

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Thermal-aware test scheduling for NOC-based 3D integrated circuits

2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2013.6673257 ◽

2013 ◽

Cited By ~ 8

Author(s):

Dong Xiang ◽

Gang Liu ◽

Krishnendu Chakrabarty ◽

Hideo Fujiwara

Keyword(s):

Integrated Circuits ◽

Test Scheduling ◽

3D Integrated Circuits

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Dynamic cache pooling for improving energy efficiency in 3D stacked multicore processors

2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2013.6673277 ◽

2013 ◽

Cited By ~ 1

Author(s):

Jie Meng ◽

Tiansheng Zhang ◽

Ayse K. Coskun

Keyword(s):

Energy Efficiency ◽

Multicore Processors

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[Title page]

2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2013.6673223 ◽

2013 ◽

Keyword(s):

Title Page

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A direct measurement scheme of amalgamated aging effects with novel on-chip sensor

2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2013.6673283 ◽

2013 ◽

Cited By ~ 4

Author(s):

Nicoleta Cucu Laurenciu ◽

Yao Wang ◽

Sorin D. Cotofana

Keyword(s):

Direct Measurement ◽

Aging Effects ◽

Measurement Scheme ◽

On Chip

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A high performance and low energy hardware for intra prediction with Template Matching

2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2013.6673290 ◽

2013 ◽

Author(s):

Yusuf Adibelli ◽

Ilker Hamzaoglu

Keyword(s):

Template Matching ◽

High Performance ◽

Intra Prediction ◽

Low Energy

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Generating fast logic circuits for m-select n-port Round Robin Arbitration

2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2013.6673286 ◽

2013 ◽

Cited By ~ 1

Author(s):

H. Fatih Ugurdag ◽

Fatih Temizkan ◽

Sezer Goren

Keyword(s):

Logic Circuits ◽

Round Robin

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2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Software-programmable digital pre-distortion on the Zynq SoC

Low cost FPGA design and implementation of a stereo matching system for 3D-TV applications

PFT — A low overhead predictability enhancement technique for non-preemptive NoCs

Analog layer extensions for analog/mixed-signal assertion languages

Thermal-aware test scheduling for NOC-based 3D integrated circuits

Dynamic cache pooling for improving energy efficiency in 3D stacked multicore processors

[Title page]

A direct measurement scheme of amalgamated aging effects with novel on-chip sensor

A high performance and low energy hardware for intra prediction with Template Matching

Generating fast logic circuits for m-select n-port Round Robin Arbitration

2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC)
Latest Publications