Communications in Computer and Information Science - VLSI Design and Test
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Published By Springer Singapore

9789813297661, 9789813297678

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Compact Modeling of Drain-Extended MOS Transistor Using BSIM-BULK Model

Communications in Computer and Information Science - VLSI Design and Test ◽

10.1007/978-981-32-9767-8_55 ◽

2019 ◽

pp. 667-678

Author(s):

Shivendra Singh Parihar ◽

Ramchandra Gurjar

Keyword(s):

Compact Modeling ◽

Mos Transistor ◽

Bulk Model

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Multi-application Based Fault-Tolerant Network-on-Chip Design for Mesh Topology Using Reconfigurable Architecture

Communications in Computer and Information Science - VLSI Design and Test ◽

10.1007/978-981-32-9767-8_37 ◽

2019 ◽

pp. 442-454

Author(s):

P. Veda Bhanu ◽

Pranav V. Kulkarni ◽

Sai Pranavi Avadhanam ◽

J. Soumya ◽

Linga Reddy Cenkeramaddi

Keyword(s):

Fault Tolerant ◽

Network On Chip ◽

Reconfigurable Architecture ◽

Chip Design ◽

Mesh Topology ◽

On Chip

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Identification of Effective Guidance Hints for Better Design Debugging by Formal Methods

Communications in Computer and Information Science - VLSI Design and Test ◽

10.1007/978-981-32-9767-8_35 ◽

2019 ◽

pp. 413-427

Author(s):

V. S. Vineesh ◽

Binod Kumar ◽

Jay Adhaduk

Keyword(s):

Formal Methods ◽

Design Debugging

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Dual-Edge Triggered Lightweight Implementation of AES for IoT Security

Communications in Computer and Information Science - VLSI Design and Test ◽

10.1007/978-981-32-9767-8_26 ◽

2019 ◽

pp. 298-307

Author(s):

Sajid Khan ◽

Neha Gupta ◽

Abhinav Vishvakarma ◽

Shailesh Singh Chouhan ◽

Jai Gopal Pandey ◽

...

Keyword(s):

Iot Security

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Threshold Implementation of a Low-Cost CLEFIA-128 Cipher for Power Analysis Attack Resistance

Communications in Computer and Information Science - VLSI Design and Test ◽

10.1007/978-981-32-9767-8_24 ◽

2019 ◽

pp. 272-285

Author(s):

S. Shanthi Rekha ◽

P. Saravanan

Keyword(s):

Power Analysis ◽

Low Cost ◽

Power Analysis Attack

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A Unified Methodology for Hardware Obfuscation and IP Watermarking

Communications in Computer and Information Science - VLSI Design and Test ◽

10.1007/978-981-32-9767-8_23 ◽

2019 ◽

pp. 258-271

Author(s):

Saurabh Gangurde ◽

Binod Kumar

Keyword(s):

Ip Watermarking

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Delay Efficient All Optical Carry Lookahead Adder

Communications in Computer and Information Science - VLSI Design and Test ◽

10.1007/978-981-32-9767-8_21 ◽

2019 ◽

pp. 236-244

Author(s):

Sayantani Roy ◽

Arighna Deb ◽

Debesh K. Das

Keyword(s):

All Optical

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Radiation Hardened by Design Sense Amplifier

Communications in Computer and Information Science - VLSI Design and Test ◽

10.1007/978-981-32-9767-8_20 ◽

2019 ◽

pp. 224-235

Author(s):

Avinash Verma ◽

Gaurav Kaushal

Keyword(s):

Sense Amplifier ◽

Radiation Hardened ◽

Radiation Hardened By Design

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A 2.4 GHz High Efficiency Capacitive Cross Coupled Common Gate Class-E Differential Power Amplifier

Communications in Computer and Information Science - VLSI Design and Test ◽

10.1007/978-981-32-9767-8_2 ◽

2019 ◽

pp. 14-22

Author(s):

Archana Sunitha ◽

Bhaskar Manickam

Keyword(s):

Power Amplifier ◽

High Efficiency ◽

Common Gate ◽

Class E

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A CMOS Low Noise Amplifier with Improved Gain

Communications in Computer and Information Science - VLSI Design and Test ◽

10.1007/978-981-32-9767-8_19 ◽

2019 ◽

pp. 215-223

Author(s):

Sunanda Ambulker ◽

Jitendra Kumar Mishra ◽

Sangeeta Nakhate

Keyword(s):

Low Noise ◽

Low Noise Amplifier ◽

Noise Amplifier

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Communications in Computer and Information Science - VLSI Design and TestLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer Singapore

Compact Modeling of Drain-Extended MOS Transistor Using BSIM-BULK Model

Multi-application Based Fault-Tolerant Network-on-Chip Design for Mesh Topology Using Reconfigurable Architecture

Identification of Effective Guidance Hints for Better Design Debugging by Formal Methods

Dual-Edge Triggered Lightweight Implementation of AES for IoT Security

Threshold Implementation of a Low-Cost CLEFIA-128 Cipher for Power Analysis Attack Resistance

A Unified Methodology for Hardware Obfuscation and IP Watermarking

Delay Efficient All Optical Carry Lookahead Adder

Radiation Hardened by Design Sense Amplifier

A 2.4 GHz High Efficiency Capacitive Cross Coupled Common Gate Class-E Differential Power Amplifier

A CMOS Low Noise Amplifier with Improved Gain

Communications in Computer and Information Science - VLSI Design and Test
Latest Publications