2016 11th International Design & Test Symposium (IDT)
Latest Publications

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Published By IEEE

9781509049004

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Non-volatile look-up table based FPGA implementations

2016 11th International Design & Test Symposium (IDT) ◽

10.1109/idt.2016.7843034 ◽

2016 ◽

Cited By ~ 2

Author(s):

Lei Xie ◽

Hoang Anh Du Nguyen ◽

Mottaqiallah Taouil ◽

Said Hamdioui ◽

Koen Bertels ◽

...

Keyword(s):

Look Up Table

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A blocking probability study for the aethereal network-on-chip

2016 11th International Design & Test Symposium (IDT) ◽

10.1109/idt.2016.7843023 ◽

2016 ◽

Cited By ~ 1

Author(s):

Guido Marchetto ◽

Sarosh Tahir ◽

Michelangelo Grosso

Keyword(s):

Blocking Probability ◽

Network On Chip ◽

On Chip

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Keynote 4: “Embedded platforms for next-generation autonomous driving systems”

2016 11th International Design & Test Symposium (IDT) ◽

10.1109/idt.2016.7843001 ◽

2016 ◽

Author(s):

Paolo Burgio

Keyword(s):

Autonomous Driving ◽

Next Generation ◽

Embedded Platforms

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Rebuilding synthesized design hierarchy based on instances path names of flattened netlist

2016 11th International Design & Test Symposium (IDT) ◽

10.1109/idt.2016.7843031 ◽

2016 ◽

Author(s):

K. Bouaziz ◽

S. Chtourou ◽

Z. Marrakchi ◽

A. M. Obeid ◽

M. Abid

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2016 11th International Design & Test Symposium (IDT) ◽

10.1109/idt.2016.7843004 ◽

2016 ◽

Download Full-text

Taking into account indirect jumps or calls in continuous control-flow checking

2016 11th International Design & Test Symposium (IDT) ◽

10.1109/idt.2016.7843027 ◽

2016 ◽

Author(s):

L. Terras ◽

Y. Teglia ◽

M. Agoyan ◽

R. Leveugle

Keyword(s):

Control Flow ◽

Continuous Control ◽

Control Flow Checking

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Real-time hardware/software co-design of a traffic sign recognition system using Zynq FPGA

2016 11th International Design & Test Symposium (IDT) ◽

10.1109/idt.2016.7843059 ◽

2016 ◽

Cited By ~ 2

Author(s):

Wajdi Farhat ◽

Hassene Faiedh ◽

Chokri Souani ◽

Kamel Besbes

Keyword(s):

Real Time ◽

Recognition System ◽

Traffic Sign Recognition ◽

Traffic Sign ◽

Sign Recognition

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A comparison and performance evaluation of FPGA soft-cores for embedded multi-core systems

2016 11th International Design & Test Symposium (IDT) ◽

10.1109/idt.2016.7843032 ◽

2016 ◽

Cited By ~ 4

Author(s):

Mariem Makni ◽

Mouna Baklouti ◽

Smail Niar ◽

Mohamed Wassim Jmal ◽

Mohamed Abid

Keyword(s):

Performance Evaluation ◽

And Performance

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Enhanced performances of paper-based Substrate Integrated waveguide (SIW) antenna for Wireless Sensor Network applications

2016 11th International Design & Test Symposium (IDT) ◽

10.1109/idt.2016.7843053 ◽

2016 ◽

Author(s):

Hiba Abdelali ◽

Rachida Bedira ◽

Hichem Trabelsi ◽

Ali Gharsallah

Keyword(s):

Wireless Sensor Network ◽

Sensor Network ◽

Wireless Sensor ◽

Substrate Integrated Waveguide ◽

Network Applications

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A low power low noise amplifier for 2.45GHz ISM receiver for Body Area Network

2016 11th International Design & Test Symposium (IDT) ◽

10.1109/idt.2016.7843058 ◽

2016 ◽

Author(s):

Maissa Daoud ◽

Hassene Mnif ◽

Mohamed Ghorbel

Keyword(s):

Low Power ◽

Low Noise ◽

Low Noise Amplifier ◽

Body Area Network ◽

Area Network ◽

Body Area ◽

Noise Amplifier

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2016 11th International Design & Test Symposium (IDT)
Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Non-volatile look-up table based FPGA implementations

A blocking probability study for the aethereal network-on-chip

Keynote 4: “Embedded platforms for next-generation autonomous driving systems”

Rebuilding synthesized design hierarchy based on instances path names of flattened netlist

Table of contents

Taking into account indirect jumps or calls in continuous control-flow checking

Real-time hardware/software co-design of a traffic sign recognition system using Zynq FPGA

A comparison and performance evaluation of FPGA soft-cores for embedded multi-core systems

Enhanced performances of paper-based Substrate Integrated waveguide (SIW) antenna for Wireless Sensor Network applications

A low power low noise amplifier for 2.45GHz ISM receiver for Body Area Network

Export Citation Format

2016 11th International Design & Test Symposium (IDT)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Non-volatile look-up table based FPGA implementations

A blocking probability study for the aethereal network-on-chip

Keynote 4: “Embedded platforms for next-generation autonomous driving systems”

Rebuilding synthesized design hierarchy based on instances path names of flattened netlist

Table of contents

Taking into account indirect jumps or calls in continuous control-flow checking

Real-time hardware/software co-design of a traffic sign recognition system using Zynq FPGA

A comparison and performance evaluation of FPGA soft-cores for embedded multi-core systems

Enhanced performances of paper-based Substrate Integrated waveguide (SIW) antenna for Wireless Sensor Network applications

A low power low noise amplifier for 2.45GHz ISM receiver for Body Area Network

2016 11th International Design & Test Symposium (IDT)
Latest Publications