2000 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop. ASMC 2000 (Cat. No.00CH37072)
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Stepper exposure field uniformity mapping using electrical critical dimension measurements

2000 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop. ASMC 2000 (Cat. No.00CH37072) ◽

10.1109/asmc.2000.902599 ◽

2002 ◽

Author(s):

B.L. McCarson ◽

T. Salisbury

Keyword(s):

Critical Dimension ◽

Exposure Field ◽

Field Uniformity

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A novel method for statistical process control of gate oxide and front-end cleans monitoring in a manufacturing environment

2000 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop. ASMC 2000 (Cat. No.00CH37072) ◽

10.1109/asmc.2000.902617 ◽

2002 ◽

Author(s):

R.G. Cosway ◽

L.S. Pirastehfar ◽

R.P. Root ◽

T.S. Roche ◽

J.R. Naujokaitis

Keyword(s):

Process Control ◽

Statistical Process Control ◽

Gate Oxide ◽

Manufacturing Environment ◽

Statistical Process ◽

Front End ◽

Novel Method

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Comparative study of two KLA-Tencor advanced patterned wafer inspection systems

2000 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop. ASMC 2000 (Cat. No.00CH37072) ◽

10.1109/asmc.2000.902575 ◽

2002 ◽

Cited By ~ 2

Author(s):

S. Rowley ◽

S. Thorne ◽

A. Bousetta ◽

C. Perry ◽

C. Dutton

Keyword(s):

Comparative Study ◽

Wafer Inspection ◽

Inspection Systems

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Tungsten silicide gate stack optimization for 170-nm DRAM technology

2000 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop. ASMC 2000 (Cat. No.00CH37072) ◽

10.1109/asmc.2000.902610 ◽

2002 ◽

Author(s):

V. Rao ◽

J. Morgan ◽

W. Hoesler ◽

J. Barden ◽

Y. Karzhavin ◽

...

Keyword(s):

Gate Stack ◽

Tungsten Silicide

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Defect reduction methodology for advanced copper dual damascene oxide etch

2000 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop. ASMC 2000 (Cat. No.00CH37072) ◽

10.1109/asmc.2000.902606 ◽

2002 ◽

Cited By ~ 1

Author(s):

P. Biolsi ◽

S. Ellinger ◽

D. Morvay

Keyword(s):

Defect Reduction ◽

Dual Damascene

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Determining the capacity components of multi chamber systems

2000 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop. ASMC 2000 (Cat. No.00CH37072) ◽

10.1109/asmc.2000.902630 ◽

2002 ◽

Author(s):

M. Mcclintock ◽

D. Martin ◽

R. Woods

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An integrated hardmask/poly RIE process for sub-0.25 um gate etch

2000 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop. ASMC 2000 (Cat. No.00CH37072) ◽

10.1109/asmc.2000.902598 ◽

2002 ◽

Author(s):

S. Shah ◽

J. Andrews ◽

M. Goss ◽

R. Kurjansky

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STM Crolles TPM deployments and success story

2000 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop. ASMC 2000 (Cat. No.00CH37072) ◽

10.1109/asmc.2000.902626 ◽

2002 ◽

Author(s):

C. Ribes

Keyword(s):

Success Story

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Development of slurry concentration adjustable tungsten chemical mechanical planarization process

2000 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop. ASMC 2000 (Cat. No.00CH37072) ◽

10.1109/asmc.2000.902622 ◽

2002 ◽

Author(s):

X.B. Wang ◽

J.B. Tan ◽

P.S. Tan ◽

Charles Lin ◽

H.J. Zhao

Keyword(s):

Chemical Mechanical Planarization ◽

Slurry Concentration ◽

Planarization Process

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Post-chemical-mechanical planarization cleaning application in metallization

2000 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop. ASMC 2000 (Cat. No.00CH37072) ◽

10.1109/asmc.2000.902624 ◽

2002 ◽

Author(s):

C. Huynh ◽

J. Chapple-Sokoi ◽

K. Pope

Keyword(s):

Chemical Mechanical Planarization

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2000 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop. ASMC 2000 (Cat. No.00CH37072)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Stepper exposure field uniformity mapping using electrical critical dimension measurements

A novel method for statistical process control of gate oxide and front-end cleans monitoring in a manufacturing environment

Comparative study of two KLA-Tencor advanced patterned wafer inspection systems

Tungsten silicide gate stack optimization for 170-nm DRAM technology

Defect reduction methodology for advanced copper dual damascene oxide etch

Determining the capacity components of multi chamber systems

An integrated hardmask/poly RIE process for sub-0.25 um gate etch

STM Crolles TPM deployments and success story

Development of slurry concentration adjustable tungsten chemical mechanical planarization process

Post-chemical-mechanical planarization cleaning application in metallization

2000 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop. ASMC 2000 (Cat. No.00CH37072)
Latest Publications