2009 IEEE 7th Symposium on Application Specific Processors
Latest Publications

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Published By IEEE

9781424449392

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Dynamic and application-driven I-cache partitioning for low-power embedded multitasking

2009 IEEE 7th Symposium on Application Specific Processors ◽

10.1109/sasp.2009.5226344 ◽

2009 ◽

Cited By ~ 3

Author(s):

Mathew Paul ◽

Peter Petrov

Keyword(s):

Low Power ◽

Cache Partitioning

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A dataflow-centric approach to design low power control paths in CGRAs

2009 IEEE 7th Symposium on Application Specific Processors ◽

10.1109/sasp.2009.5226330 ◽

2009 ◽

Cited By ~ 2

Author(s):

Hyunchul Park ◽

Yongjun Park ◽

Scott Mahlke

Keyword(s):

Low Power ◽

Power Control

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Power-efficient medical image processing using PUMA

2009 IEEE 7th Symposium on Application Specific Processors ◽

10.1109/sasp.2009.5226332 ◽

2009 ◽

Cited By ~ 3

Author(s):

Ganesh Dasika ◽

Kevin Fan ◽

Scott Mahlke

Keyword(s):

Image Processing ◽

Medical Image ◽

Medical Image Processing ◽

Power Efficient

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A multi-FPGA accelerator for radiation dose calculation in cancer treatment

2009 IEEE 7th Symposium on Application Specific Processors ◽

10.1109/sasp.2009.5226340 ◽

2009 ◽

Author(s):

Bo Zhou ◽

X. Sharon Hu ◽

Danny Z. Chen ◽

Cedric X. Yu

Keyword(s):

Radiation Dose ◽

Cancer Treatment ◽

Dose Calculation

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Arithmetic optimization for custom instruction set synthesis

2009 IEEE 7th Symposium on Application Specific Processors ◽

10.1109/sasp.2009.5226336 ◽

2009 ◽

Cited By ~ 1

Author(s):

Ajay K. Verma ◽

Yi Zhu ◽

Philip Brisk ◽

Paolo Ienne

Keyword(s):

Instruction Set ◽

Custom Instruction

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A design space exploration methodology supporting run-time resource management for multi-processor Systems-on-chip

2009 IEEE 7th Symposium on Application Specific Processors ◽

10.1109/sasp.2009.5226331 ◽

2009 ◽

Cited By ~ 7

Author(s):

Giovanni Mariani ◽

Gianluca Palermo ◽

Cristina Silvano ◽

Vittorio Zaccaria

Keyword(s):

Resource Management ◽

Design Space Exploration ◽

Design Space ◽

Space Exploration ◽

Systems On Chip ◽

Run Time ◽

On Chip ◽

Time Resource

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Workload adaptive shared memory multicore processors with reconfigurable interconnects

2009 IEEE 7th Symposium on Application Specific Processors ◽

10.1109/sasp.2009.5226329 ◽

2009 ◽

Cited By ~ 2

Author(s):

Shoaib Akram ◽

Rakesh Kumar ◽

Deming Chen

Keyword(s):

Shared Memory ◽

Multicore Processors

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FCUDA: Enabling efficient compilation of CUDA kernels onto FPGAs

2009 IEEE 7th Symposium on Application Specific Processors ◽

10.1109/sasp.2009.5226333 ◽

2009 ◽

Cited By ~ 80

Author(s):

Alexandros Papakonstantinou ◽

Karthik Gururaj ◽

John A. Stratton ◽

Deming Chen ◽

Jason Cong ◽

...

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A parameterisable and scalable Smith-Waterman algorithm implementation on CUDA-compatible GPUs

2009 IEEE 7th Symposium on Application Specific Processors ◽

10.1109/sasp.2009.5226343 ◽

2009 ◽

Cited By ~ 8

Author(s):

Cheng Ling ◽

Khaled Benkrid ◽

Tsuyoshi Hamada

Keyword(s):

Algorithm Implementation

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Register Multimapping: A technique for reducing register bank conflicts in processors with large register files

2009 IEEE 7th Symposium on Application Specific Processors ◽

10.1109/sasp.2009.5226335 ◽

2009 ◽

Cited By ~ 1

Author(s):

Nam Duong ◽

Rakesh Kumar

Keyword(s):

Download Full-text

2009 IEEE 7th Symposium on Application Specific ProcessorsLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Dynamic and application-driven I-cache partitioning for low-power embedded multitasking

A dataflow-centric approach to design low power control paths in CGRAs

Power-efficient medical image processing using PUMA

A multi-FPGA accelerator for radiation dose calculation in cancer treatment

Arithmetic optimization for custom instruction set synthesis

A design space exploration methodology supporting run-time resource management for multi-processor Systems-on-chip

Workload adaptive shared memory multicore processors with reconfigurable interconnects

FCUDA: Enabling efficient compilation of CUDA kernels onto FPGAs

A parameterisable and scalable Smith-Waterman algorithm implementation on CUDA-compatible GPUs

Register Multimapping: A technique for reducing register bank conflicts in processors with large register files

2009 IEEE 7th Symposium on Application Specific Processors
Latest Publications