Proceedings of the 15th ACM Great Lakes symposium on VLSI - GLSVSLI '05
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A novel clock generation scheme for globally asynchronous locally synchronous systems

Proceedings of the 15th ACM Great Lakes symposium on VLSI - GLSVSLI '05 ◽

10.1145/1057661.1057733 ◽

2005 ◽

Author(s):

Kamran Saleh ◽

Mehrdad Najibi ◽

Mohsen Naderi ◽

Hossein Pedram ◽

Mehdi Sedighi

Keyword(s):

Clock Generation ◽

Globally Asynchronous Locally Synchronous ◽

Synchronous Systems

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A VLSI array processing oriented fast fourier transform algorithm and hardware implementation

Proceedings of the 15th ACM Great Lakes symposium on VLSI - GLSVSLI '05 ◽

10.1145/1057661.1057731 ◽

2005 ◽

Author(s):

Zhenyu Liu ◽

Yang Song ◽

Takeshi Ikenaga ◽

Satoshi Goto

Keyword(s):

Fourier Transform ◽

Fast Fourier Transform ◽

Hardware Implementation ◽

Array Processing ◽

Fast Fourier Transform Algorithm ◽

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An empirical study of crosstalk in VDSM technologies

Proceedings of the 15th ACM Great Lakes symposium on VLSI - GLSVSLI '05 ◽

10.1145/1057661.1057737 ◽

2005 ◽

Author(s):

Shahin Nazarian ◽

Massoud Pedram ◽

Emre Tuncer

Keyword(s):

Empirical Study

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A 3.84 gbits/s AES crypto coprocessor with modes of operation in a 0.18-μm CMOS technology

Proceedings of the 15th ACM Great Lakes symposium on VLSI - GLSVSLI '05 ◽

10.1145/1057661.1057677 ◽

2005 ◽

Author(s):

Alireza Hodjat ◽

David D. Hwang ◽

Bocheng Lai ◽

Kris Tiri ◽

Ingrid Verbauwhede

Keyword(s):

Cmos Technology ◽

Modes Of Operation

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A congestion-driven placement framework with local congestion prediction

Proceedings of the 15th ACM Great Lakes symposium on VLSI - GLSVSLI '05 ◽

10.1145/1057661.1057778 ◽

2005 ◽

Author(s):

Qinghua Liu ◽

Malgorzata Marek-Sadowska

Keyword(s):

Congestion Prediction

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Adaptive gate biasing

Proceedings of the 15th ACM Great Lakes symposium on VLSI - GLSVSLI '05 ◽

10.1145/1057661.1057774 ◽

2005 ◽

Author(s):

Stephen C. Terry ◽

Mohommad M. Mojarradi ◽

Benjamin J. Blalock ◽

Jesse A. Richmond

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An improved direct boundary element method for substrate coupling resistance extraction

Proceedings of the 15th ACM Great Lakes symposium on VLSI - GLSVSLI '05 ◽

10.1145/1057661.1057683 ◽

2005 ◽

Author(s):

Xiren Wang ◽

Wenjian Yu ◽

Zeyi Wang ◽

Xianlong Hong

Keyword(s):

Boundary Element Method ◽

Boundary Element ◽

Substrate Coupling ◽

Coupling Resistance ◽

Direct Boundary Element Method ◽

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An FPGA design of AES encryption circuit with 128-bit keys

Proceedings of the 15th ACM Great Lakes symposium on VLSI - GLSVSLI '05 ◽

10.1145/1057661.1057697 ◽

2005 ◽

Author(s):

Hui Qin ◽

Tsutomu Sasao ◽

Yukihiro Iguchi

Keyword(s):

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Increasing design space of the instruction queue with tag coding

Proceedings of the 15th ACM Great Lakes symposium on VLSI - GLSVSLI '05 ◽

10.1145/1057661.1057757 ◽

2005 ◽

Author(s):

Junwei Zhou ◽

Andrew Mason

Keyword(s):

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Instruction scheduling using MAX-MIN ant system optimization

Proceedings of the 15th ACM Great Lakes symposium on VLSI - GLSVSLI '05 ◽

10.1145/1057661.1057674 ◽

2005 ◽

Author(s):

Gang Wang ◽

Wenrui Gong ◽

Ryan Kastner

Keyword(s):

System Optimization ◽

Instruction Scheduling ◽

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