Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
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Published By Springer Berlin Heidelberg

9783642118012, 9783642118029

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Assertive Dynamic Power Management (AsDPM) Strategy for Globally Scheduled RT Multiprocessor Systems

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-642-11802-9_16 ◽

2010 ◽

pp. 116-126

Author(s):

Muhammad Khurram Bhatti ◽

Muhammad Farooq ◽

Cécile Belleudy ◽

Michel Auguin ◽

Ons Mbarek

Keyword(s):

Power Management ◽

Multiprocessor Systems ◽

Dynamic Power Management ◽

Dynamic Power

Interpreting SSTA Results with Correlation

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-642-11802-9_6 ◽

2010 ◽

pp. 16-25

Author(s):

Zeqin Wu ◽

Philippe Maurine ◽

Nadine Azemard ◽

Gille Ducharme

A New Optimized High-Speed Low-Power Data-Driven Dynamic (D3L) 32-Bit Kogge-Stone Adder

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-642-11802-9_40 ◽

2010 ◽

pp. 357-366 ◽

Cited By ~ 2

Author(s):

Fabio Frustaci ◽

Marco Lanuzza

Keyword(s):

Low Power ◽

High Speed ◽

Data Driven

Clock Repeater Characterization for Jitter-Aware Clock Tree Synthesis

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-642-11802-9_9 ◽

2010 ◽

pp. 46-55 ◽

Cited By ~ 1

Author(s):

Monica Figueiredo ◽

Rui L. Aguiar

Keyword(s):

Clock Tree ◽

Clock Tree Synthesis ◽

Tree Synthesis

BSAA: A Switching Activity Analysis and Visualisation Tool for SoC Power Optimisation

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-642-11802-9_26 ◽

2010 ◽

pp. 216-226

Author(s):

Tom English ◽

Ka Lok Man ◽

Emanuel Popovici

Keyword(s):

Activity Analysis ◽

Switching Activity ◽

Visualisation Tool

Write Invalidation Analysis in Chip Multiprocessors

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-642-11802-9_24 ◽

2010 ◽

pp. 196-205

Author(s):

Newsha Ardalani ◽

Amirali Baniasadi

Keyword(s):

Chip Multiprocessors

On-chip Thermal Modeling Based on SPICE Simulation

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-642-11802-9_11 ◽

2010 ◽

pp. 66-75 ◽

Cited By ~ 5

Author(s):

Wei Liu ◽

Andrea Calimera ◽

Alberto Nannarelli ◽

Enrico Macii ◽

Massimo Poncino

Keyword(s):

Thermal Modeling ◽

Spice Simulation ◽

On Chip

Data-Driven Clock Gating for Digital Filters

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-642-11802-9_14 ◽

2010 ◽

pp. 96-105 ◽

Cited By ~ 2

Author(s):

Alberto Bonanno ◽

Alberto Bocca ◽

Alberto Macii ◽

Enrico Macii ◽

Massimo Poncino

Keyword(s):

Digital Filters ◽

Data Driven ◽

Clock Gating

SystemC AMS Extensions: New Language – New Methods – New Applications

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-642-11802-9_4 ◽

2010 ◽

pp. 4-4

Author(s):

Martin Barnasconi ◽

Markus Damm ◽

Karsten Einwich

Keyword(s):

New Methods ◽

New Applications

Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-642-11802-9_27 ◽

2010 ◽

pp. 227-236

Author(s):

Gaurang Upasani ◽

Andrea Calimera ◽

Alberto Macii ◽

Enrico Macii ◽

Massimo Poncino

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and SimulationLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer Berlin Heidelberg

Assertive Dynamic Power Management (AsDPM) Strategy for Globally Scheduled RT Multiprocessor Systems

Interpreting SSTA Results with Correlation

A New Optimized High-Speed Low-Power Data-Driven Dynamic (D3L) 32-Bit Kogge-Stone Adder

Clock Repeater Characterization for Jitter-Aware Clock Tree Synthesis

BSAA: A Switching Activity Analysis and Visualisation Tool for SoC Power Optimisation

Write Invalidation Analysis in Chip Multiprocessors

On-chip Thermal Modeling Based on SPICE Simulation

Data-Driven Clock Gating for Digital Filters

SystemC AMS Extensions: New Language – New Methods – New Applications

Reducing Timing Overhead in Simultaneously Clock-Gated and Power-Gated Designs by Placement-Aware Clustering

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Latest Publications