2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT)
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93

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9781467344357, 9781467344364

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Timing-aware clock gating of pulsed-latch circuits for low power design

2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT) ◽

10.1109/vldi-dat.2013.6533819 ◽

2013 ◽

Author(s):

Zong-Han Yang ◽

Tsung-Yi Ho

Keyword(s):

Low Power ◽

Low Power Design ◽

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A real-time parallel scalable video encoder for multimedia streaming systems

2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT) ◽

10.1109/vldi-dat.2013.6533845 ◽

2013 ◽

Author(s):

Guo-An Jian ◽

Jui-Sheng Lee ◽

Kheng-Joo Tan ◽

Peng-Sheng Chen ◽

Jiun-In Guo

Keyword(s):

Real Time ◽

Multimedia Streaming ◽

Scalable Video ◽

Video Encoder ◽

Streaming Systems

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An efficient deadlock-free multicast routing algorithm for mesh-based networks-on-chip

2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT) ◽

10.1109/vldi-dat.2013.6533824 ◽

2013 ◽

Author(s):

Kuen-Jong Lee ◽

Chin-Yao Chang ◽

Hung-Yang Yang

Keyword(s):

Multicast Routing ◽

Routing Algorithm ◽

Networks On Chip ◽

On Chip ◽

Multicast Routing Algorithm

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A 180 MHz direct access read 4.6Mb embedded flash in 90nm technology operating under wide range power supply from 2.1V to 3.6V

2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT) ◽

10.1109/vldi-dat.2013.6533858 ◽

2013 ◽

Author(s):

Hung-Chang Yu ◽

Ku-Feng Lin ◽

Kai-Chun Lin ◽

Yu-Der Chih ◽

S. Natarajan

Keyword(s):

Power Supply ◽

Direct Access ◽

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A versatile data cache for trace buffer support

2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT) ◽

10.1109/vldi-dat.2013.6533821 ◽

2013 ◽

Author(s):

Chun-Hung Lai ◽

Yun-Chung Yang ◽

Ing-Jer Huang

Keyword(s):

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Hybrid path-diversity-aware adaptive routing with latency prediction model in Network-on-Chip systems

2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT) ◽

10.1109/vldi-dat.2013.6533884 ◽

2013 ◽

Author(s):

Po-An Tsai ◽

Yu-Hsin Kuo ◽

En-Jui Chang ◽

Hsien-Kai Hsin ◽

An-Yeu Wu

Keyword(s):

Prediction Model ◽

Adaptive Routing ◽

Network On Chip ◽

Path Diversity ◽

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Analysis of the leakage effect in a pipelined ADC with nanoscale CMOS technologies

2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT) ◽

10.1109/vldi-dat.2013.6533874 ◽

2013 ◽

Author(s):

Chin-Yu Lin ◽

Yen-Chuan Huang ◽

Tai-Cheng Lee

Keyword(s):

Pipelined Adc ◽

Nanoscale Cmos ◽

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A 0.5V/1.0V fast lock-in ADPLL for DVFS battery-powered devices

2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT) ◽

10.1109/vldi-dat.2013.6533868 ◽

2013 ◽

Author(s):

Ching-Che Chung ◽

Duo Sheng ◽

Wei-Siang Su

Keyword(s):

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Terahertz electronics: Opportunities, challenges and technologies

2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT) ◽

10.1109/vldi-dat.2013.6533814 ◽

2013 ◽

Author(s):

T. Lee

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Design challenges for analog & mixed signal designs

2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT) ◽

10.1109/vldi-dat.2013.6533860 ◽

2013 ◽

Author(s):

Jeong-Tyng Li

Keyword(s):

Mixed Signal ◽

Design Challenges

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