1998 IEEE International Integrated Reliability Workshop Final Report (Cat. No.98TH8363)
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C-V Measurements - And Its Implication On Oxide, Transistor And Non-volatile Memory Cell Reliability

1998 IEEE International Integrated Reliability Workshop Final Report (Cat. No.98TH8363) ◽

10.1109/irws.1998.745378 ◽

2005 ◽

Author(s):

U. Schwalke ◽

B. Gordon

Keyword(s):

Memory Cell ◽

Non Volatile Memory ◽

Volatile Memory

Electrostatic Discharge - Esd

1998 IEEE International Integrated Reliability Workshop Final Report (Cat. No.98TH8363) ◽

10.1109/irws.1998.745377 ◽

2005 ◽

Author(s):

H. Gieser ◽

E. Worley

Keyword(s):

Electrostatic Discharge

Monitoring charging in high current ion implanters yields optimum preventive maintenance schedules and procedures

1998 IEEE International Integrated Reliability Workshop Final Report (Cat. No.98TH8363) ◽

10.1109/irws.1998.745373 ◽

2002 ◽

Author(s):

H. Gonzalez ◽

S. Reno ◽

C. Messick ◽

W. Lukaszek ◽

T. Romanski

Keyword(s):

Preventive Maintenance ◽

High Current ◽

Maintenance Schedules

A new mechanism for gate oxide degradation and its applications

1998 IEEE International Integrated Reliability Workshop Final Report (Cat. No.98TH8363) ◽

10.1109/irws.1998.745370 ◽

2002 ◽

Author(s):

C.H. Liu ◽

K.Y. Fu ◽

T.A. DeMassa ◽

J.J. Sanchez

Keyword(s):

Gate Oxide ◽

Oxide Degradation

A constant gate current technique for obtaining low-frequency C-V characteristics of MOS capacitors

1998 IEEE International Integrated Reliability Workshop Final Report (Cat. No.98TH8363) ◽

10.1109/irws.1998.745365 ◽

2002 ◽

Author(s):

J.G. Qian ◽

R.A. Hensley ◽

E. Littefield

Keyword(s):

Low Frequency ◽

Mos Capacitors ◽

Gate Current ◽

Current Technique

The life time model using the correlation between dielectric thickness, and voltage stress for 64 Mb DRAM accelerated reliability testing

1998 IEEE International Integrated Reliability Workshop Final Report (Cat. No.98TH8363) ◽

10.1109/irws.1998.745366 ◽

2002 ◽

Author(s):

Yumi Kwon ◽

Namhyun Cha ◽

Samjin Hwang ◽

Namsung Cho ◽

Whajoon Lee

Keyword(s):

Life Time ◽

Reliability Testing ◽

Time Model ◽

Dielectric Thickness ◽

Voltage Stress

Complete method for E/sub bd/ correction by series resistance characterization

1998 IEEE International Integrated Reliability Workshop Final Report (Cat. No.98TH8363) ◽

10.1109/irws.1998.745364 ◽

2002 ◽

Author(s):

D.K. Monroe ◽

S.E. Swanson

Keyword(s):

Series Resistance

Characterizing electron shower with CHARM(R)-2 wafers on Eaton NV-8200P medium current ion implanter

1998 IEEE International Integrated Reliability Workshop Final Report (Cat. No.98TH8363) ◽

10.1109/irws.1998.745374 ◽

2002 ◽

Author(s):

S. Reno ◽

H. Gonzalez ◽

C. Messick ◽

W. Lukaszek ◽

D.A. St. Angelo ◽

...

Keyword(s):

Electron Shower

A preliminary investigation of the kinetics of post-oxidation anneal induced E'-precursor formation

1998 IEEE International Integrated Reliability Workshop Final Report (Cat. No.98TH8363) ◽

10.1109/irws.1998.745369 ◽

2002 ◽

Author(s):

J.F. Conley ◽

P.M. Lenahan ◽

W.F. McArthur

Keyword(s):

Preliminary Investigation ◽

Kinetics Of

Electrostatic discharge (ESD) technology benchmarking strategy for evaluating ESD robustness of CMOS technologies

1998 IEEE International Integrated Reliability Workshop Final Report (Cat. No.98TH8363) ◽

10.1109/irws.1998.745371 ◽

2002 ◽

Cited By ~ 2

Author(s):

S. Voldman ◽

W. Anderson ◽

R. Ashton ◽

M. Chaine ◽

C. Duvvury ◽

...

Keyword(s):

Electrostatic Discharge

1998 IEEE International Integrated Reliability Workshop Final Report (Cat. No.98TH8363)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

C-V Measurements - And Its Implication On Oxide, Transistor And Non-volatile Memory Cell Reliability

Electrostatic Discharge - Esd

Monitoring charging in high current ion implanters yields optimum preventive maintenance schedules and procedures

A new mechanism for gate oxide degradation and its applications

A constant gate current technique for obtaining low-frequency C-V characteristics of MOS capacitors

The life time model using the correlation between dielectric thickness, and voltage stress for 64 Mb DRAM accelerated reliability testing

Complete method for E/sub bd/ correction by series resistance characterization

Characterizing electron shower with CHARM(R)-2 wafers on Eaton NV-8200P medium current ion implanter

A preliminary investigation of the kinetics of post-oxidation anneal induced E'-precursor formation

Electrostatic discharge (ESD) technology benchmarking strategy for evaluating ESD robustness of CMOS technologies

1998 IEEE International Integrated Reliability Workshop Final Report (Cat. No.98TH8363)
Latest Publications