Numerical Modelling of Carrier Transport in Organic Field Effect Transistors

Organic field effect transistors (OFETs), used in the fabrication of nano-sensors, are one of the most promising devices in the field of organic electronics, because of their light weight, flexible and low fabrication cost. However, the optimization of such OFETs is still in an early stage due to the very limited analytical as well as numerical models presented in the literature. This research presses to demonstrate a numerical carrier transport model based on finite element method (FEM), to investigate the I-V characteristic of OFETs. Two various organic semiconductor materials have been included in the study, polyaniline and pentacene, where a micro-scale as well as a nano-scale models have been presented. OFETs have been studied in terms of channel length, dielectric thickness, and doping level impact. We nominated the threshold voltage, the on/off current ratio, the sub threshold swing, and the field effect mobility’s as the main output evaluating parameters. The numerical model has shown the criticality of the doping effect on tuning the device flowing drain current, to exceed 300 μA saturation current, along with threshold voltage of -0.1 V under a channel length of 30 nm. Additionally, the study highlights the effectiveness of the polyaniline over pentacene as nano-channel length OFET, due to the boosted conductivity of polyaniline with respect to pentacene.

The simulation of the microwave shielding properties of the dual band pass frequency selective surface

Without proper caution, the microwave leakage from a microwave oven door can be harmful to users’ health. In practice, the leaked radiation has to be blocked while the visible light is allowed to pass for a visual inspection of the cooking progress inside the oven. To fulfil the requirements, the door design based on the principle of the frequency selective surface (FSS) was proposed and the gridded square loop pattern was chosen. In the simulation conducted by COMSOL Multiphysics software, the size of the proposed FSS was given as 40.7×40.7 mm with a dielectric thickness of 2.8 mm. Two important characteristics in terms of shielding effectiveness (SE) and optical transparency (OT) of the proposed FSS configuration at normal incidence were simulated and found to be 62.7 dB and 57.5%, respectively. The simulation results indicate that the proposed FSS is applicable to a safety design of a microwave oven door in suppressing the microwave leakage. Parametric studies on the characteristics due to geometrical dimensions and glass substrate thickness were also investigated. These parameters were found to affect the shielding and transmitting performances of the proposed FSS.

Super-Nernstian ion sensitive field-effect transistor exploiting charge screening in WSe2/MoS2 heterostructure

Ion-sensitive field-effect transistors (ISFETs) have gained a lot of attention in recent times as compact, low-cost biosensors with fast response time and label-free detection. Dual gate ISFETs have been shown to enhance detection sensitivity beyond the Nernst limit of 59 mV pH−1 when the back gate dielectric is much thicker than the top dielectric. However, the thicker back-dielectric limits its application for ultrascaled point-of-care devices. In this work, we introduce and demonstrate a pH sensor, with WSe2(top)/MoS2(bottom) heterostructure based double gated ISFET. The proposed device is capable of surpassing the Nernst detection limit and uses thin high-k hafnium oxide as the gate oxide. The 2D atomic layered structure, combined with nanometer-thick top and bottom oxides, offers excellent scalability and linear response with a maximum sensitivity of 362 mV pH−1. We have also used technology computer-aided (TCAD) simulations to elucidate the underlying physics, namely back gate electric field screening through channel and interface charges due to the heterointerface. The proposed mechanism is independent of the dielectric thickness that makes miniaturization of these devices easier. We also demonstrate super-Nernstian behavior with the flipped MoS2(top)/WSe2(bottom) heterostructure ISFET. The results open up a new pathway of 2D heterostructure engineering as an excellent option for enhancing ISFET sensitivity beyond the Nernst limit, for the next-generation of label-free biosensors for single-molecular detection and point-of-care diagnostics.

Simulation of Cold Atmospheric Plasma Generated by Floating-Electrode Dielectric Barrier Pulsed Discharge Used for the Cancer Cell Necrosis

A numerical simulation of a pulsed floating electrode dielectric barrier discharge (FE-DBD) at atmospheric pressure, used for melanoma cancer cell therapy, is performed using a plasma model in COMSOL Multiphysics software. Distributions of electron density, space charge, and electric field are presented at different instants of the pulsed argon discharge. Significant results related to the characteristics of the plasma device used, the inter-electrodes distance, and the power supply are obtained to improve the efficiency of FE-DBD apparatus for melanoma cancer cell treatment. The FE-DBD presents a higher sensitivity to short pulse durations, related to the accumulated charge over the dielectric barrier around the powered electrode. At higher applied voltage, more energy is injected into the discharge channel and an increase in electron density and electric consumed power is noted. Anticancer activity provided by the FE-DBD plasma is improved using a small interelectrode distance with a high electron emission coefficient and a high dielectric constant with a small dielectric thickness, allowing higher electron density, generating reactive species responsible for the apoptosis of tumor cells.

Structure-selected graphene/metallic surface plasmon coupling regime and infrared modulation application

Here we present a graphene-based long-wavelength infrared modulator characteristic of extra-high contrast, where the frequency detuning degree of magnetic and electric surface plasmons (SPs) is controllable by the gated graphene Fermi energy. If the device is designed to work in a strong SP-coupling regime by selecting an appropriate low-lossy gate dielectric thickness, a modulation depth (MD) up to ~100% but insertion loss (IL) as low as ~-0.37 dB is achievable. Moreover, a compromised MD >90% with IL <-1.0 dB is still retainable in two broadband ranges. The disclosed underlying mechanism to the device working state in the strong, electromagnetic-induced transparency (EIT), or weak SP-coupling regime, indicates the coupling regime shows a strong dependence on the dielectric thickness, which is related to the magnetic-SP mode volume, while the working wavelength can be selected in a broader spectral range by scaling the device geometry. These findings are helpful to construct those optoelectronics for infrared absorption enhancement, EIT, and strong coupling spectral characteristic itself.

Dielectric Film Thickness Measurement Via a Convolutional Neural Network for Integrated Circuit Delayering End Point Detection

The integrated circuit (IC) delayering workflow is heavily reliant on operator experience to determine the processing end point, which is the ideal point on an IC where processing should be terminated, to optimize region of interest imaging. The current method of end point detection during IC delayering utilizes qualitative correlation between dielectric film color and dielectric thickness observed via optical microscopy to guide decision making. The goal of this work is to quantify this relationship using computer vision. In the field of computer vision, convolutional neural networks (CNNs) have been successfully applied to capture spatial relationships within images. Given this success, a CNN was trained for thickness estimates of dielectric films using optical images captured during processing for eventual automated end point detection. The trained model explained 39% of the variance in dielectric film thickness with a mean absolute error of approximately 47 nm.

Analog/RF Performance Analysis of a-ITZO Thin Film Transistor

This work reports RF and analog performance analysis of an amorphous Indium Tin Zinc Oxide thin film transistor. The various parameters affecting the performance of a-ITZO TFT like drain current, drain conductance, output resistance, transconductance, transconductance generation factor, early voltage, intrinsic gain, capacitances, cut off frequency, maximum frequency of oscillation, transconductance frequency product, gain frequency product, gain bandwidth product and gain transconductance frequency product have been closely examined. The device is further analyzed to investigate the impact of variation in physical parameters viz. dielectric material, dielectric thickness (𝐷𝑡 ) and temperature (T) on the RF/Analog performance. Use of high-k dielectric material in the simulated structure has resulted in low subthreshold slope (SS) of 0.62 V/decade, On voltage (𝑉𝑜𝑛) of (- 0.29) V, 𝐼𝑜𝑛/𝐼𝑜𝑓𝑓 ratio of ~ 109 , intrinsic gain (𝐴𝑉) of 104.5 dB and gain frequency product (GFP) of 1.86 GHz. The best results for dielectric thickness variation are offered for dielectric thickness of 150 nm with SS of 0.22 V/decade, 𝑉𝑜𝑛 of (-0.26 V), 𝐼𝑜𝑛/𝐼𝑜𝑓𝑓 of ~ 1010 , (𝐴𝑉) of 175.69 dB and GFP of 2.39 GHz. For device reliability and stability study, temperature analysis has also been done. To demonstrate the circuit level implementation of the simulated structure, a resistive load inverter circuit is simulated and analyzed for different variations (high-k, 𝐷𝑡 and T). The results obtained are promising to meet the current display industry requirement. It has also been concluded that TFT with high-k material or thinner dielectric at T=300 K provides best performance.

Influence of Exposed Electrode Thickness on Plasma Actuators Performance for Coupled Deicing and Flow Control Applications

Dielectric Barrier Discharge (DBD) plasma actuators are a popular topic of research within the active flow control field. Recently, these devices have gained interest for deicing and ice prevention applications and it has been proved they allow to perform simultaneously deicing and flow control. Studies have shown that the exposed electrode plays an important role on the surface temperature field of the plasma actuator. Thus, in the current study, by the first time, we investigate the influence of the exposed electrode thickness on the induced velocity flow field and surface temperature field. Three plasma actuators with different dielectric thicknesses (0.3 mm, 0.6 mm and 1.02 mm) were mounted with a thick exposed electrode (thickness of 0.8 mm). These three actuators with thick exposed electrode were experimentally studied and compared against other three plasma actuators with same dielectric thickness but with a thin exposed electrode (thickness of 80 μm). The DBD actuators were experimentally studied considering their electrical, mechanical and thermal behavior. The results are presented and discussed in order to understand the influence of the exposed electrode thickness on the mechanical and thermal plasma actuator performances.

Ultra Steep Ge-source Dopingless Tunnelling Field Effect Transistor with Enhanced Drive Current

Ge-source dopingless tunnelling field effect transistor (Ge-source DLTFET) with the optimization of dielectric oxide thickness under the source and the gate contacts is proposed and investigated by calibrated 2D TCAD device simulation. As the structure is realized using dopingless technique, this enables lower thermal budget, higher immunity towards the random dopant fluctuations (RDFs) effects and velocity degradation effects. The optimization of dielectric thickness has been done to tune the carrier concentrations induced in source and channel regions in order to improve the device performance. The drive current is magnificently enhanced along with ION/IOFF ratio, peak transconductance and ultra-steep subthreshold slope (SS) is reported for the optimized Si-DLTFET. In addition to this by deploying Ge-source instead of Si source in optimized Si-DLTFET increases ON current slightly and OFF current gets reduced by the order of two as compared to the optimized Si-DLTFET. This improves the ION/IOFF ratio,the reported drive current for Ge-source DLTFET is 5.1×10− 4 A/µm, along with ION/IOFF ratio as 1.54×1013, peak transconductance as 1.26 mS/µm and ultra-steep SS as 1.69 mV/decade. Further, the analog, RF and linearity performance parameters have also been investigated for both the structures and demonstrated notable improvement. The energy efficiency investigationreveals a significant reduction in energy-delay product. This paper indicates thepotentials of optimized Si-DLTFET and Ge-source DLTFET as promising candidates for low power analog and RF applications and Ge-source DLTFET hasbetter device dc performance.

Evaluating Energy Generation Capacity of PVDF Sensors: Effects of Sensor Geometry and Loading

This paper focuses on the energy generating capacity of polyvinylidene difluoride (PVDF) piezoelectric material through a number of prototype sensors with different geometric and loading characteristics. The effect of sensor configuration, surface area, dielectric thickness, aspect ratio, loading frequency and strain on electrical power output was investigated systematically. Results showed that parallel bimorph sensor was found to be the best energy harvester, with measured capacitance being reasonably acceptable. Power output increased with the increase of sensor’s surface area, loading frequency, and mechanical strain, but decreased with the increase of the sensor thickness. For all scenarios, sensors under flicking loading exhibited higher power output than that under bending. A widely used energy harvesting circuit had been utilized successfully to convert the AC signal to DC, but at the sacrifice of some losses in power output. This study provided a useful insight and experimental validation into the optimization process for an energy harvester based on human movement for future development.