IFIP Advances in Information and Communication Technology - VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability
Latest Publications

TOTAL DOCUMENTS

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By Springer International Publishing

9783319671031, 9783319671048

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping

IFIP Advances in Information and Communication Technology - VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability ◽

10.1007/978-3-319-67104-8_8 ◽

2017 ◽

pp. 152-172 ◽

Cited By ~ 1

Author(s):

Valentino Peluso ◽

Roberto G. Rizzo ◽

Andrea Calimera ◽

Enrico Macii ◽

Massimo Alioto

Keyword(s):

Fine Grain

Earth Mover’s Distance as a Comparison Metric for Analog Behavior

IFIP Advances in Information and Communication Technology - VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability ◽

10.1007/978-3-319-67104-8_9 ◽

2017 ◽

pp. 173-191

Author(s):

Alexander W. Rath ◽

Sebastian Simon ◽

Volkan Esen ◽

Wolfgang Ecker

Keyword(s):

Earth Mover’S Distance ◽

Earth Mover's Distance ◽

Analog Behavior

Logic Synthesis for Silicon and Beyond-Silicon Multi-gate Pass-Logic Circuits

IFIP Advances in Information and Communication Technology - VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability ◽

10.1007/978-3-319-67104-8_4 ◽

2017 ◽

pp. 60-82

Author(s):

Valerio Tenace ◽

Andrea Calimera ◽

Enrico Macii ◽

Massimo Poncino

Keyword(s):

Logic Synthesis ◽

Logic Circuits

Logic with Unipolar Memristors – Circuits and Design Methodology

IFIP Advances in Information and Communication Technology - VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability ◽

10.1007/978-3-319-67104-8_2 ◽

2017 ◽

pp. 24-40 ◽

Cited By ~ 1

Author(s):

Nimrod Wald ◽

Elad Amrani ◽

Avishay Drori ◽

Shahar Kvatinsky

Keyword(s):

Design Methodology

A Novel Hardware-Oriented Stereo Matching Algorithm and Its Architecture Design in FPGA

IFIP Advances in Information and Communication Technology - VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability ◽

10.1007/978-3-319-67104-8_11 ◽

2017 ◽

pp. 213-232

Author(s):

Yanzhe Li ◽

Kai Huang ◽

Luc Claesen

Keyword(s):

Stereo Matching ◽

Architecture Design ◽

Matching Algorithm

Robust Hybrid TFET-MOSFET Circuits in Presence of Process Variations and Soft Errors

IFIP Advances in Information and Communication Technology - VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability ◽

10.1007/978-3-319-67104-8_3 ◽

2017 ◽

pp. 41-59

Author(s):

Maedeh Hemmat ◽

Mehdi Kamal ◽

Ali Afzali-Kusha ◽

Massoud Pedram

Keyword(s):

Soft Errors ◽

Process Variations

Approximate Matrix Inversion for Linear Pre-coders in Massive MIMO

IFIP Advances in Information and Communication Technology - VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability ◽

10.1007/978-3-319-67104-8_10 ◽

2017 ◽

pp. 192-212

Author(s):

Syed Mohsin Abbas ◽

Chi-Ying Tsui

Keyword(s):

Massive Mimo ◽

Matrix Inversion

Digital Hardware Design Based on Metamodels and Model Transformations

IFIP Advances in Information and Communication Technology - VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability ◽

10.1007/978-3-319-67104-8_5 ◽

2017 ◽

pp. 83-107

Author(s):

Johannes Schreiner ◽

Wolfgang Ecker

Keyword(s):

Hardware Design ◽

Model Transformations ◽

Digital Hardware

Improving the Efficiency of Formal Verification: The Case of Clock-Domain Crossings

IFIP Advances in Information and Communication Technology - VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability ◽

10.1007/978-3-319-67104-8_6 ◽

2017 ◽

pp. 108-129

Author(s):

Guillaume Plassan ◽

Hans-Jörg Peter ◽

Katell Morin-Allory ◽

Shaker Sarwary ◽

Dominique Borrione

Keyword(s):

Formal Verification

Enabling Internet-of-Things with Opportunities Brought by Emerging Devices, Circuits and Architectures

IFIP Advances in Information and Communication Technology - VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability ◽

10.1007/978-3-319-67104-8_1 ◽

2017 ◽

pp. 1-23

Author(s):

Xueqing Li ◽

Kaisheng Ma ◽

Sumitha George ◽

John Sampson ◽

Vijaykrishnan Narayanan

Keyword(s):

Internet Of Things

IFIP Advances in Information and Communication Technology - VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and ReliabilityLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer International Publishing

Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping

Earth Mover’s Distance as a Comparison Metric for Analog Behavior

Logic Synthesis for Silicon and Beyond-Silicon Multi-gate Pass-Logic Circuits

Logic with Unipolar Memristors – Circuits and Design Methodology

A Novel Hardware-Oriented Stereo Matching Algorithm and Its Architecture Design in FPGA

Robust Hybrid TFET-MOSFET Circuits in Presence of Process Variations and Soft Errors

Approximate Matrix Inversion for Linear Pre-coders in Massive MIMO

Digital Hardware Design Based on Metamodels and Model Transformations

Improving the Efficiency of Formal Verification: The Case of Clock-Domain Crossings

Enabling Internet-of-Things with Opportunities Brought by Emerging Devices, Circuits and Architectures

IFIP Advances in Information and Communication Technology - VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability
Latest Publications