Performance Evaluation of an Ethernet-Based Cabin Network Architecture Supporting a Low-Latency Service

2014 ◽  
pp. 69-80
Author(s):  
Fabien Geyer ◽  
Stefan Schneele ◽  
Wolfgang Fischer
Keyword(s):  
Performance Evaluation ◽  
Network Architecture ◽  
Low Latency

Network architecture and performance evaluation of TCP/IP and ATM over satellite

2000 ◽  
Author(s):  
Y. Chotikapong ◽  
Z. Sun ◽  
B. Evans ◽  
T. Ors
Keyword(s):  
Performance Evaluation ◽  
Network Architecture ◽  
And Performance

An overview of the 5G mobile network architecture

2018 ◽  
Author(s):  
Phanidra Palagummi ◽  
Vedant Somani ◽  
Krishna M. Sivalingam ◽  
Balaji Venkat
Keyword(s):  
Wireless Network ◽  
Mobile Networks ◽  
Network Architecture ◽  
Mobile Network ◽  
Communication Technologies ◽  
Future Generation ◽  
Network Function Virtualization ◽  
Low Latency ◽  
High Bandwidth ◽  
Network Technologies

Networking connectivity is increasingly based on wireless network technologies, especially in developing nations where the wired network infrastructure is not accessible to a large segment of the population. Wireless data network technologies based on 2G and 3G are quite common globally; 4G-based deployments are on the rise during the past few years. At the same time, the increasing high-bandwidth and low-latency requirements of mobile applications has propelled the Third Generation Partnership Project (3GPP) standards organization to develop standards for the next generation of mobile networks, based on recent advances in wireless communication technologies. This standard is called the Fifth Generation (5G) wireless network standard. This paper presents a high-level overview of the important architectural components, of the advanced communication technologies, of the advanced networking technologies such as Network Function Virtualization and other important aspects that are part of the 5G network standards. The paper also describes some of the common future generation applications that require low-latency and high-bandwidth communications.

scholarly journals FOSquare: A Novel Optical HPC Interconnect Network Architecture Based on Fast Optical Switches with Distributed Optical Flow Control

Photonics ◽  
2021 ◽  
Vol 8 (1) ◽  
pp. 11
Author(s):  
Fulong Yan ◽  
Changshun Yuan ◽  
Chao Li ◽  
Xiong Deng
Keyword(s):  
Flow Control ◽  
Network Architecture ◽  
Network Performance ◽  
Optical Switches ◽  
Low Power Consumption ◽  
Low Latency ◽  
High Bandwidth ◽  
Fast Flow ◽  
Real Traffic ◽  
Interconnect Network

Interconnecting networks adopting Fast Optical Switches (FOS) can achieve high bandwidth, low latency, and low power consumption. We propose and demonstrate a novel interconnecting topology based on FOS (FOSquare) with distributed fast flow control which is suitable for HPC infrastructures. We also present an Optimized Mapping (OPM) algorithm that maps the most communication-related processes inside a rack. We numerically investigate and compare the network performance of FOSquare with Leaf-Spine under real traffic traces collected by running multiple applications (CG, MG, MILC, and MINI_MD) in an HPC infrastructure. The numerical results show that the FOSquare can reduce >10% latency with respect to Leaf-Spine under the scenario of 16 available cores.

Towards cost-effective and low latency data center network architecture

2016 ◽  
Vol 82 ◽  
pp. 1-12 ◽  
Author(s):  
Ting Wang ◽  
Zhiyang Su ◽  
Yu Xia ◽  
Bo Qin ◽  
Mounir Hamdi
Keyword(s):  
Data Center ◽  
Network Architecture ◽  
Cost Effective ◽  
Low Latency ◽  
Data Center Network ◽  
Latency Data

A Performance Evaluation of an In-body Nano-Network Architecture

2020 ◽  
Author(s):  
Sebastian Canovas-Carrasco ◽  
Rafael Asorey-Cacheda ◽  
Antonio-Javier Garcia-Sanchez ◽  
Joan Garcia-Haro ◽  
Pawel Kulakowski ◽  
...  
Keyword(s):  
Performance Evaluation ◽  
Network Architecture ◽  
A Performance

AN FPGA-BASED PLATFORM FOR A NETWORK ARCHITECTURE WITH DELAY GUARANTEE

2013 ◽  
Vol 22 (06) ◽  
pp. 1350045 ◽  
Author(s):  
MACIEJ WIELGOSZ ◽  
MAURITZ PANGGABEAN ◽  
JIANG WANG ◽  
LEIF ARNE RØNNINGEN
Keyword(s):  
Network Architecture ◽  
Multimedia Data ◽  
Low Latency ◽  
Traffic Condition ◽  
Network Nodes ◽  
Delay Guarantee ◽  
Design And Implementation ◽  
Platform Architecture ◽  
Delay Sensitive ◽  
Field Programmable

The background that underlies this work is the envisioned real-time tele-immersive collaboration system for the future that supports delay-sensitive applications involving participants from remote places via their collaboration spaces (CSs). The end-to-end delay as high as 20 ms is required for good synchronization of such applications, for example collaborative dancing and remote conducting of choir. It is much lower than that facilitated by existing teleconference systems. A novel network architecture with delay guarantee, namely Distributed Multimedia Plays (DMP), has been proposed and designed to realize the vision. The maximum low latency is guaranteed because DMP network nodes can drop DMP packets of multimedia data from the CSs due to instantaneous traffic condition. Besides ultrafast processing time, modularity, and scalability must be taken into account in hardware design and implementation of the nodes for seamless incorporation of the modules. These lead us to employing field-programmable gate array (FPGA) due to its substantial computational power and flexibility. This paper presents an FPGA-based platform for the design and implementation of DMP network nodes. It provides a detailed introduction to the platform architecture and the simulation-implementation environment for the design. The modularity of the implemented node is shown by addressing three important modules for packet dropping, 3D warping, and image transform. Our compact implementation of the network node on Xilinx Virtex-6 ML605 mostly consumes very small amount of available resources. Moreover the elementary operations on our implementation takes (much) less than 5 μs as desired to meet the low-latency requirement.

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