scholarly journals Object-Oriented Genetic Improvement for Improved Energy Consumption in Google Guava

Author(s):  
Nathan Burles ◽  
Edward Bowles ◽  
Alexander E. I. Brownlee ◽  
Zoltan A. Kocsis ◽  
Jerry Swan ◽  
...  
IEEE Access ◽  
2018 ◽  
Vol 6 ◽  
pp. 62664-62674
Author(s):  
Hui Liu ◽  
Fusheng Yan ◽  
Jingqing Jiang ◽  
Jie Song

Author(s):  
Marcello Pellicciari ◽  
Giovanni Berselli ◽  
Francesco Leali ◽  
Alberto Vergnano ◽  
Bengt Lennartson

The development of safe, energy efficient mechatronic systems is currently changing standard paradigms in the design and control of industrial manipulators. In particular, most optimization strategies require the improvement or the substitution of different system components. On the other hand, from an industry point of view, it would be desirable to develop energy saving methods applicable also to established manufacturing systems being liable of small possibilities for adjustments. Within this scenario, an engineering method is reported for optimizing the energy consumption of serial manipulators for a given operation. An object-oriented modeling technique, based on bond graph, is used to derive the robot electromechanical dynamics. The system power flow is then highlighted and parameterized as a function of the total execution times. Finally, a case study is reported showing the possibility to reduce the operation energy consumption when allowed by scheduling or manufacturing constraints.


2007 ◽  
Vol 2 (1) ◽  
pp. 7-13
Author(s):  
Antonio Carlos S. Beck ◽  
Mateus B. Rutzig ◽  
Luigi Carro

Java, with its advantages as being an overspread multiplatform object oriented language, has been gaining popularity in the embedded system market over the years. However, because of its extralayer of interpretation, it is also believed that it is a slow language while being executed. Nevertheless, when this execution is done directly in hardware, Java advantages caused by its stacknature start to appear. One of these advantages concerns memory utilization, impacting in less accesses and cache misses. In this work we analyze this impact in performance and energy consumption,comparing a Java processor with a RISC one based on a MIPS architecture with similar characteristics.


2021 ◽  
Author(s):  
Abdulqader Mahmoud ◽  
Frederic Vanderveken ◽  
Florin Ciubotaru ◽  
Christoph Adelmann ◽  
Sorin Cotofana ◽  
...  

Due to their very nature, Spin Waves (SWs) created in the same waveguide, but with different frequencies, can coexist while selectively interacting with their own species only. The absence of inter-frequency interferences isolates input data sets encoded in SWs with different frequencies and creates the premises for simultaneous data parallel SW based processing without hardware replication or delay overhead. In this paper we leverage this SW property by introducing a novel computation paradigm, which allows for the parallel processing of n-bit input data vectors on the same basic SW based logic gate. Subsequently, to demonstrate the proposed concept, we present 8-bit parallel 3-input Majority gate implementation and validate it by means of Object Oriented MicroMagnetic Framework (OOMMF) simulations. To evaluate the potential benefit of our proposal we compare the 8-bit data parallel gate with equivalent scalar SW gate based implementation. Our evaluation indicates that 8-bit data 3-input Majority gate implementation requires 4.16x less area than the scalar SW gate based equivalent counterpart while preserving the same delay and energy consumption figures.


2021 ◽  
Author(s):  
Abdulqader Mahmoud ◽  
Frederic Vanderveken ◽  
Florin Ciubotaru ◽  
Christoph Adelmann ◽  
Sorin Cotofana ◽  
...  

Due to their very nature, Spin Waves (SWs) created in the same waveguide, but with different frequencies, can coexist while selectively interacting with their own species only. The absence of inter-frequency interferences isolates input data sets encoded in SWs with different frequencies and creates the premises for simultaneous data parallel SW based processing without hardware replication or delay overhead. In this paper we leverage this SW property by introducing a novel computation paradigm, which allows for the parallel processing of n-bit input data vectors on the same basic SW based logic gate. Subsequently, to demonstrate the proposed concept, we present 8-bit parallel 3-input Majority gate implementation and validate it by means of Object Oriented MicroMagnetic Framework (OOMMF) simulations. To evaluate the potential benefit of our proposal we compare the 8-bit data parallel gate with equivalent scalar SW gate based implementation. Our evaluation indicates that 8-bit data 3-input Majority gate implementation requires 4.16x less area than the scalar SW gate based equivalent counterpart while preserving the same delay and energy consumption figures.


Sign in / Sign up

Export Citation Format

Share Document