DSP Code Generation with Optimized Data Word-Length Selection

Author(s):  
Daniel Menard ◽  
Olivier Sentieys

Multi rate strategy is fundamental for systems with different data and yield taking a gander at rates. Late advances in negligible figuring and correspondence applications deals low power and rapid VLSI DSP structures. This Paper presents Multi rate modules used for binding to offer sign overseeing in remote correspondence structure. Distinctive arranging made for the structure of low multifaceted nature, bit parallel Multiple Constant Multiplications improvement which principles the unusualness of DSP systems. In any case, basic hindrances of present approaches are either outrageously extravagant or not profitable enough. On the other hand, MCM and digit-consecutive snake offer elective low multifaceted nature plans, since digit-dynamic structure consolidate less space and are free of the data word length. Distinctive Constant Multiplications is capable way to deal with oversee decrease the proportion of enlargement and subtraction in poly stage channel execution. This Multi rate structure believing is purposeful and real to various issues. In this paper, thought has given to the MCM and digit dynamic structure with moving and including technique that offers elective low multifaceted nature in exercises. This paper what's more pivoted around Multi rate Signal Processing Modules using Voltage and Technology scaling. Lessening of intensity use is giant for VLSI system and moreover it ends up one of the most fundamental game-plan parameter.


2012 ◽  
Vol 2012 ◽  
pp. 1-10 ◽  
Author(s):  
L. Charaabi

This paper investigates the numerical issue of a discrete-time induction-motor emulator implementation. The stability analysis of the finite-word-length implementation shows a coupling between required word length and the sample rate. We propose specific guidelines to analyze this coupling and to estimate the required data word length for both signals and coefficients of the model. To respect algorithm requirements, an FPGA-based implementation was used for architecture development. The direct torque control is implemented to verify in real time the AC-motor emulator prototype.


Author(s):  
Masashi TAWADA ◽  
Shinji KIMURA ◽  
Masao YANAGISAWA ◽  
Nozomu TOGAWA

2019 ◽  
Vol 7 (5) ◽  
pp. 824-828
Author(s):  
Anaswara Venunadh ◽  
Shruthi N ◽  
Mannar Mannan

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