Low Power and Storage Efficient Parallel Lookup Engine Architecture for IP Packets

Author(s):  
Alireza Mahini ◽  
Reza Berangi ◽  
Hossein Mohtashami ◽  
Hamidreza Mahini
Keyword(s):  
Author(s):  
Erik Brockmeyer ◽  
Cedric Ghez ◽  
Wim Baetens ◽  
Francky Catthoor

2014 ◽  
Vol 2014 ◽  
pp. 1-17 ◽  
Author(s):  
Charles W. Solbrig ◽  
Chad L. Pope ◽  
Jason P. Andrus

The Zero Power Physics Reactor (ZPPR) operated from April 18, 1969, until 1990. ZPPR operated at low power for testing nuclear reactor designs. This paper examines the temperature of Pu content ZPPR fuel while it is in storage. Heat is generated in the fuel due to Pu and Am decay and is a concern for possible cladding damage. Damage to the cladding could lead to fuel hydriding and oxidizing. A series of computer simulations were made to determine the range of temperatures potentially occuring in the ZPPR fuel. The maximum calculated fuel temperature is 292°C (558°F). Conservative assumptions in the model intentionally overestimate temperatures. The stored fuel temperatures are dependent on the distribution of fuel in the surrounding storage compartments, the heat generation rate of the fuel, and the orientation of fuel. Direct fuel temperatures could not be measured but storage bin doors, storage sleeve doors, and storage canister temperatures were measured. Comparison of these three temperatures to the calculations indicates that the temperatures calculated with conservative assumptions are, as expected, higher than the actual temperatures. The maximum calculated fuel temperature with the most conservative assumptions is significantly below the fuel failure criterion of 600°C (1,112°F).


Author(s):  
Yue Zhang ◽  
Linwei Tao

In order to realize the acquisition and storage of underwater acoustic signals for aiming at the requirements of multi-channel, low power consumption and small volume for underwater receiver extension of sonar system, a multi-channel signal acquisition and storage system based on FPGA and STM32 with variable number of working channels and sampling frequency is designed, in which the system is consisted of 8 pieces, 8 channel and 24 bits high dynamic range Δ-Σ ADS1278 ADC chip to synchronous multi-channel analog signal acquisition. FPGA, as the acquisition sequence and logic control, reads and collates the ADC chip data and writes it into the internal high-capacity FIFO, and adds corresponding operations according to the characteristics of FIFO in an application. SMT32 single-chip microcomputer reads the FIFO data through the high-speed SPI interface with FPGA and writes the multi-channel data into the high-capacity SD card. The testing results have verified that the system has characteristics such as stable and reliable, easy configuration, low power consumption, can guarantee the multichannel data serial transmission, storage, accurate, up to 64 analog signals at the same time the real-time collection and storage, top 20 kHz sampling rate, the system total power of the system of about 3W, data rates up to 100 Mb/s, fully meet the needs of underwater sound acquisition system.


2012 ◽  
Vol 33 ◽  
pp. 1776-1782
Author(s):  
Qing-Ming Yi ◽  
Min Shi ◽  
Yi-Hua He

1998 ◽  
Vol 16 (1) ◽  
pp. 120-129 ◽  
Author(s):  
L. Nachtergaele ◽  
F. Catthoor ◽  
B. Kapoor ◽  
S. Janssens ◽  
D. Moolenaar

Author(s):  
Kenneth Gudan ◽  
Shuai Shao ◽  
Jonathan J. Hull ◽  
Alexander Hoang ◽  
Joshua Ensworth ◽  
...  

2012 ◽  
Vol 49 (1) ◽  
pp. 292-301 ◽  
Author(s):  
Steven R. Anton ◽  
Alper Erturk ◽  
Daniel J. Inman

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