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An Efficient Lightweight Shared Cache Design for Chip Multiprocessors
Lecture Notes in Computer Science - Advanced Parallel Processing Technologies
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10.1007/978-3-642-03644-6_3
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2009
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pp. 28-40
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Cited By ~ 2
Author(s):
Jinglei Wang
◽
Dongsheng Wang
◽
Yibo Xue
◽
Haixia Wang
Keyword(s):
Chip Multiprocessors
◽
Shared Cache
◽
Cache Design
Download Full-text
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References
Novel fairness-aware co-scheduling for shared cache contention game on chip multiprocessors
Information Sciences
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10.1016/j.ins.2020.03.078
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2020
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Vol 526
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pp. 68-85
Author(s):
Zheng Xiao
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Liwen Chen
◽
Bangyong Wang
◽
Jiayi Du
◽
Keqin Li
Keyword(s):
Chip Multiprocessors
◽
Shared Cache
◽
Cache Contention
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On Chip
Download Full-text
NoC-aware cache design for multithreaded execution on tiled chip multiprocessors
Proceedings of the 6th International Conference on High Performance and Embedded Architectures and Compilers - HiPEAC '11
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10.1145/1944862.1944891
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2011
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Cited By ~ 6
Author(s):
Ahmed K. Abousamra
◽
Alex K. Jones
◽
Rami G. Melhem
Keyword(s):
Chip Multiprocessors
◽
Cache Design
Download Full-text
Energy aware and reliable STT-RAM based cache design for 3D embedded chip-multiprocessors
2017 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)
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10.1109/recosoc.2017.8016154
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2017
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Cited By ~ 2
Author(s):
Fatemeh Arezoomand
◽
Arghavan Asad
◽
Mahdi Fazeli
◽
Mahmood Fathy
◽
Farah Mohammadi
Keyword(s):
Chip Multiprocessors
◽
Energy Aware
◽
Cache Design
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Embedded Chip
Download Full-text
A dedicated private-shared cache design for scalable multiprocessors
Concurrency and Computation Practice and Experience
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10.1002/cpe.3871
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2016
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Vol 29
(2)
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pp. e3871
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Cited By ~ 1
Author(s):
Juan M. Cebrián
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Ricardo Fernández-Pascual
◽
Alexandra Jimborean
◽
Manuel E. Acacio
◽
Alberto Ros
Keyword(s):
Shared Cache
◽
Scalable Multiprocessors
◽
Cache Design
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An interference miss isolation mechanism based on skewed mapping for shared cache in Chip Multiprocessors
2013 IEEE 10th International Conference on ASIC
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10.1109/asicon.2013.6811977
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2013
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Author(s):
Anwen Huang
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Chao Song
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Wei Guo
◽
Peng Li
◽
Minxuan Zhang
Keyword(s):
Chip Multiprocessors
◽
Shared Cache
Download Full-text
PS-cache: an energy-efficient cache design for chip multiprocessors
Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques
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10.1109/pact.2013.6618832
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2013
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Cited By ~ 1
Author(s):
Youngjoon Jo
◽
Michael Goldfarb
◽
Milind Kulkarni
Keyword(s):
Energy Efficient
◽
Chip Multiprocessors
◽
Cache Design
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Location Cache Design and Performance Analysis for Chip Multiprocessors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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10.1109/tvlsi.2009.2028429
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2011
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Vol 19
(1)
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pp. 104-117
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Cited By ~ 5
Author(s):
Jason Nemeth
◽
Rui Min
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Wen-Ben Jone
◽
Yiming Hu
Keyword(s):
Performance Analysis
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Chip Multiprocessors
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And Performance
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Cache Design
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SOS: A Software-Oriented Distributed Shared Cache Management Approach for Chip Multiprocessors
2009 18th International Conference on Parallel Architectures and Compilation Techniques
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10.1109/pact.2009.14
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2009
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Cited By ~ 13
Author(s):
Lei Jin
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Sangyeun Cho
Keyword(s):
Chip Multiprocessors
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Management Approach
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Cache Management
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Shared Cache
Download Full-text
Optimizing shared cache behavior of chip multiprocessors
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture - Micro-42
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10.1145/1669112.1669176
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2009
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Cited By ~ 24
Author(s):
Mahmut Kandemir
◽
Sai Prashanth Muralidhara
◽
Sri Hari Krishna Narayanan
◽
Yuanrui Zhang
◽
Ozcan Ozturk
Keyword(s):
Chip Multiprocessors
◽
Shared Cache
Download Full-text
NoC-aware cache design for chip multiprocessors
Proceedings of the 19th international conference on Parallel architectures and compilation techniques - PACT '10
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10.1145/1854273.1854354
◽
2010
◽
Cited By ~ 2
Author(s):
Ahmed K. Abousamra
◽
Rami G. Melhem
◽
Alex K. Jones
Keyword(s):
Chip Multiprocessors
◽
Cache Design
Download Full-text
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