An Enhanced System Level to Link Level Mapping Method for 3GPP LTE System Level Simulation

Author(s):  
Yuan Gao ◽  
HongYi Yu
2011 ◽  
Vol 58-60 ◽  
pp. 1596-1601 ◽  
Author(s):  
Yuan Gao ◽  
Yin Sun ◽  
Chun Hui Zhou ◽  
Xin Su ◽  
Xi Bin Xu ◽  
...  

With the rapid progress of standardization of 3GPP’s LTE (Long Term Evolution) and LTE-Advanced, many research attentions have been focused on the link level evaluations of the 3GPP LTE systems, so as to demonstrate the rationality of novel transmission techniques. Different from theoretical studies, incorporating novel transmission techniques in to the LTE communication systems may affect many parts of the systems, such as signaling process, reference signal design, feedback link design, and compatibility, etc. Link level studies might be too simple to evaluate the benefits of these novel techniques to the entire system. On the other hand, system level simulation concentrates on the performance of the entire network with tens of cells and hundreds to thousands of users. It is possible to illustrate the actual performance of a LTE system by simulations designed from a system standpoint. Since the simulated system is quite large, one can understand the speed of simulation is very important for system level simulation platform. In this paper, we propose a design of Matlab-based 3GPP LTE system level simulator, which makes use of parallel computing techniques supported by NVidia GeForce GTX 260 graphic card. Our simulation experience shows that the simulation time reduces by nearly 1/3 after employing parallel computing techniques.


Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 644
Author(s):  
Michal Frivaldsky ◽  
Jan Morgos ◽  
Michal Prazenica ◽  
Kristian Takacs

In this paper, we describe a procedure for designing an accurate simulation model using a price-wised linear approach referred to as the power semiconductor converters of a DC microgrid concept. Initially, the selection of topologies of individual power stage blocs are identified. Due to the requirements for verifying the accuracy of the simulation model, physical samples of power converters are realized with a power ratio of 1:10. The focus was on optimization of operational parameters such as real-time behavior (variable waveforms within a time domain), efficiency, and the voltage/current ripples. The approach was compared to real-time operation and efficiency performance was evaluated showing the accuracy and suitability of the presented approach. The results show the potential for developing complex smart grid simulation models, with a high level of accuracy, and thus the possibility to investigate various operational scenarios and the impact of power converter characteristics on the performance of a smart gird. Two possible operational scenarios of the proposed smart grid concept are evaluated and demonstrate that an accurate hardware-in-the-loop (HIL) system can be designed.


2021 ◽  
Vol 18 (4) ◽  
pp. 1-27
Author(s):  
Yasir Mahmood Qureshi ◽  
William Andrew Simon ◽  
Marina Zapater ◽  
Katzalin Olcoz ◽  
David Atienza

The increasing adoption of smart systems in our daily life has led to the development of new applications with varying performance and energy constraints, and suitable computing architectures need to be developed for these new applications. In this article, we present gem5-X, a system-level simulation framework, based on gem-5, for architectural exploration of heterogeneous many-core systems. To demonstrate the capabilities of gem5-X, real-time video analytics is used as a case-study. It is composed of two kernels, namely, video encoding and image classification using convolutional neural networks (CNNs). First, we explore through gem5-X the benefits of latest 3D high bandwidth memory (HBM2) in different architectural configurations. Then, using a two-step exploration methodology, we develop a new optimized clustered-heterogeneous architecture with HBM2 in gem5-X for video analytics application. In this proposed clustered-heterogeneous architecture, ARMv8 in-order cluster with in-cache computing engine executes the video encoding kernel, giving 20% performance and 54% energy benefits compared to baseline ARM in-order and Out-of-Order systems, respectively. Furthermore, thanks to gem5-X, we conclude that ARM Out-of-Order clusters with HBM2 are the best choice to run visual recognition using CNNs, as they outperform DDR4-based system by up to 30% both in terms of performance and energy savings.


Sign in / Sign up

Export Citation Format

Share Document