scholarly journals Quality attribute trade-offs in the embedded systems industry: an exploratory case study

2019 ◽  
Vol 28 (2) ◽  
pp. 505-534 ◽  
Author(s):  
Darius Sas ◽  
Paris Avgeriou
Keyword(s):  
Embedded Systems ◽  
Ad Hoc ◽  
Quality Attributes ◽  
Tool Support ◽  
Exploratory Case Study ◽  
Design Time ◽  
Trade Offs ◽  
Run Time ◽  
Automated Tools

AbstractThe embedded systems domain has grown exponentially over the past years. The industry is forced by the market to rapidly improve and release new products to beat the competition. Frenetic development rhythms thus shape this domain and give rise to several new challenges for software design and development. One of them is dealing with trade-offs between run-time and design-time quality attributes. To study practices, processes and tools concerning the management of run-time and design-time quality attributes as well as the trade-offs among them from the perspective of embedded systems software engineers. An exploratory case study with two qualitative data collection steps, namely interviews and a focus group, involving six different companies from the embedded systems domain with a total of twenty participants. The interviewed subjects showed a preference for run-time over design-time qualities. Trade-offs between design-time and run-time qualities are very common, but they are often implicit, due to the lack of adequate monitoring tools and practices. Practitioners prefer to deal with trade-offs in the most lightweight way possible, by applying ad-hoc practices, thus avoiding any overhead incurred. Finally, practitioners have elaborated on how they envision the ideal tool support for dealing with trade-offs. Although it is notoriously difficult to deal with trade-offs, constantly monitoring the quality attributes of interest with automated tools is key in making explicit and prudent trade-offs and mitigating the risk of incurring technical debt.

A Neuron Library for Rapid Realization of Artificial Neural Networks on FPGA: A Case Study of Rössler Chaotic System

2016 ◽  
Vol 26 (01) ◽  
pp. 1750015 ◽  
Author(s):  
İsmail Koyuncu ◽  
İbrahim Şahin ◽  
Clay Gloster ◽  
Namık Kemal Sarıtekin
Keyword(s):  
Neural Networks ◽  
Artificial Neural Networks ◽  
Embedded Systems ◽  
Neural Cells ◽  
Activation Functions ◽  
Design Time ◽  
Software Implementations ◽  
Artificial Neural ◽  
Automation Tools

Artificial neural networks (ANNs) are implemented in hardware when software implementations are inadequate in terms of performance. Implementing an ANN as hardware without using design automation tools is a time consuming process. On the other hand, this process can be automated using pre-designed neurons. Thus, in this work, several artificial neural cells were designed and implemented to form a library of neurons for rapid realization of ANNs on FPGA-based embedded systems. The library contains a total of 60 different neurons, two-, four- and six-input biased and non-biased, with each having 10 different activation functions. The neurons are highly pipelined and were designed to be connected to each other like Lego pieces. Chip statistics of the neurons showed that depending on the type of the neuron, about 25 selected neurons can be fit in to the smallest Virtex-6 chip and an ANN formed using the neurons can be clocked up to 576.89[Formula: see text]MHz. ANN based Rössler system was constructed to show the effectiveness of using neurons in rapid realization of ANNs on embedded systems. Our experiments with the neurons showed that using these neurons, ANNs can rapidly be implemented as hardware and design time can significantly be reduced.

Business Process Security Analysis – Design Time, Run Time, Audit Time

2013 ◽  
Vol 55 (6) ◽  
Author(s):  
Frank Böhr ◽  
Linh Thao Ly ◽  
Günter Müller
Keyword(s):  
Business Process ◽  
Process Management ◽  
Business Processes ◽  
Security Analysis ◽  
Holistic Approach ◽  
Security Requirements ◽  
Tool Support ◽  
Workflow Model ◽  
Design Time ◽  
Run Time

AbstractThis paper reports on approaches and tool support for security and compliance analysis of executable business processes, so-called workflows, employed in the GESINE project. Specifically, focusing on the business layer and the corresponding workflow entities along the business process management lifecycle (i. e., workflow model, instance and event log), the techniques reported on in this paper cover the design time, run time and audit time analysis. Their goal is to verify the adherence to security requirements, such as the four-eyes principle and separation and binding of duties. Altogether, the complementary techniques described in this paper enable a holistic approach to ensure the security of workflows.

scholarly journals Tool Support for Co-Simulation-Based Analysis

2020 ◽  
pp. 269-282
Author(s):  
Karsten Albers ◽  
Benjamin Bolte ◽  
Max-Arno Meyer ◽  
Axel Terfloth ◽  
Anna Wißdorf
Keyword(s):  
Embedded Systems ◽  
Best Practices ◽  
Tool Support ◽  
Tool Integration ◽  
Simulation Tools ◽  
Design Time ◽  
Simulation Based ◽  
Methodological Aspects ◽  
Context Simulation ◽  
General Tool

AbstractThe development of collaborative embedded systems (CESs) requires the validation of their runtime behavior during design time. In this context, simulation-based analysis methods play a key role in the development of such systems. Simulations of CESs tend to become complex. One cause is that CESs work in collaborative system groups (CSGs) within a dynamic context., which is why CESs must be simulated as participants of a CSG. Another cause stems from the fact that CES simulations cover various cyber-physical domains. The models incorporated are often managed by different tools that are specialized for specific simulation disciplines and must be jointly executed in a cosimulation. Besides the methodological aspects, the interoperability of models and tools within such a co-simulation is a major challenge. This chapter focusses on the tool integration aspect of enabling co-simulations. It motivates the need for co-simulation for CES development and describes a general tool architecture. The chapter presents the advantages and limitations of adopting existing standards such as FMI and DCP, as well as best practices for integrating simulation tools and models for CESs and CSGs.

Compiler-Aided Run-Time Performance Speed-Up in Super-Scalar Processor

10.28945/3391 ◽  
2009 ◽  
Author(s):  
Moshe Pelleh
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
General Purpose ◽  
Experimental Results ◽  
Medium Size ◽  
Organic System ◽  
Software Application ◽  
Organic Systems ◽  
Special Cases ◽  
Run Time

In our world, where most systems become embedded systems, the approach of designing embedded systems is still frequently similar to the approach of designing organic systems (or not embedded systems). An organic system, like a personal computer or a work station, must be able to run any task submitted to it at any time (with certain constrains depending on the machine). Consequently, it must have a sophisticated general purpose Operating System (OS) to schedule, dispatch, maintain and monitor the tasks and assist them in special cases (particularly communication and synchronization between them and with external devices). These OSs require an overhead on the memory, on the cache and on the run time. Moreover, generally they are task oriented rather than machine oriented; therefore the processor's throughput is penalized. On the other hand, an embedded system, like an Anti-lock Braking System (ABS), executes always the same software application. Frequently it is a small or medium size system, or made up of several such systems. Many small or medium size embedded systems, with limited number of tasks, can be scheduled by our proposed hardware architecture, based on the Motorola 500MHz MPC7410 processor, enhancing its throughput and avoiding the software OS overhead, complexity, maintenance and price. Encouraged by our experimental results, we shall develop a compiler to assist our method. In the meantime we will present here our proposal and the experimental results.

A Problem in the Making: How Firms Formulate Sharable Problems for Open Innovation Contests

2018 ◽  
Author(s):  
Martin W. Wallin ◽  
Georg von Krogh ◽  
Jan Henrik Sieg
Keyword(s):  
Knowledge Creation ◽  
Open Innovation ◽  
Problem Formulation ◽  
Theoretical Framework ◽  
Monetary Reward ◽  
Technical Innovation ◽  
Prior Work ◽  
Exploratory Case Study ◽  
External Sources

Crowdsourcing in the form of innovation contests stimulates knowledge creation external to the firm by distributing technical, innovation-related problems to external solvers and by proposing a fixed monetary reward for solutions. While prior work demonstrates that innovation contests can generate solutions of value to the firm, little is known about how problems are formulated for such contests. We investigate problem formulation in a multiple exploratory case study of seven firms and inductively develop a theoretical framework that explains the mechanisms of formulating sharable problems for innovation contests. The chapter contributes to the literatures on crowdsourcing and open innovation by providing a rare account of the intra-organizational implications of engaging in innovation contests and by providing initial clues to problem formulation—a critical antecedent to firms’ ability to leverage external sources of innovation.

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