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A single layer zero skew clock routing in X architecture
Science in China Series F Information Sciences
◽
10.1007/s11432-009-0028-6
◽
2009
◽
Vol 52
(8)
◽
pp. 1466-1475
◽
Cited By ~ 2
Author(s):
WeiXiang Shen
◽
YiCi Cai
◽
XianLong Hong
◽
Jiang Hu
◽
Bing Lu
Keyword(s):
Single Layer
◽
Clock Routing
◽
X Architecture
◽
Zero Skew
Download Full-text
Related Documents
Cited By
References
Planar-CRX: A Single-Layer Zero Skew Clock Routing in X-Architecture
8th International Symposium on Quality Electronic Design (ISQED'07)
◽
10.1109/isqed.2007.120
◽
2007
◽
Author(s):
Weixiang Shen
◽
Yici Cai
◽
Xianlong Hong
◽
Jiang Hu
◽
Bing Lu
Keyword(s):
Single Layer
◽
Clock Routing
◽
X Architecture
◽
Zero Skew
Download Full-text
Zero skew clock routing in X-architecture based on an improved greedy matching algorithm
Integration
◽
10.1016/j.vlsi.2007.10.004
◽
2008
◽
Vol 41
(3)
◽
pp. 426-438
◽
Cited By ~ 4
Author(s):
Weixiang Shen
◽
Yici Cai
◽
Xianlong Hong
◽
Jiang Hu
◽
Bing Lu
Keyword(s):
Matching Algorithm
◽
Clock Routing
◽
X Architecture
◽
Zero Skew
Download Full-text
A zero-skew clock routing scheme for VLSI circuits
IEEE/ACM International Conference on Computer-Aided Design
◽
10.1109/iccad.1992.279328
◽
1992
◽
Cited By ~ 13
Author(s):
Li
◽
Jabri
Keyword(s):
Vlsi Circuits
◽
Routing Scheme
◽
Clock Routing
◽
Zero Skew
Download Full-text
Pattern-matching-based X-architecture zero-skew clock tree construction with X-Flip technique and via delay consideration
Integration
◽
10.1016/j.vlsi.2010.09.002
◽
2011
◽
Vol 44
(1)
◽
pp. 87-101
◽
Cited By ~ 3
Author(s):
Chung-Chieh Kuo
◽
Chia-Chun Tsai
◽
Trong-Yen Lee
Keyword(s):
Pattern Matching
◽
Clock Tree
◽
Tree Construction
◽
X Architecture
◽
Zero Skew
Download Full-text
Zero-skew clock routing trees with minimum wirelength
[1992] Proceedings. Fifth Annual IEEE International ASIC Conference and Exhibit
◽
10.1109/asic.1992.270316
◽
2003
◽
Cited By ~ 111
Author(s):
K.D. Boese
◽
A.B. Kahng
Keyword(s):
Clock Routing
◽
Zero Skew
Download Full-text
Zero skew clock routing for fast clock tree generation
The International Conference on Electrical Engineering
◽
10.21608/iceeng.2008.34322
◽
2008
◽
Vol 6
(6)
◽
pp. 1-11
Author(s):
M. Reaz
◽
M. Ibrahimy
◽
F. Mohd-Yasin
◽
A. Mohammad
Keyword(s):
Clock Tree
◽
Tree Generation
◽
Clock Routing
◽
Zero Skew
Download Full-text
X-architecture zero-skew clock tree construction with performance and DFM considerations
2010 International SoC Design Conference
◽
10.1109/socdc.2010.5682914
◽
2010
◽
Cited By ~ 1
Author(s):
Chia-Chun Tsai
◽
Chung-Chieh Kuo
◽
Feng-Tzu Hsu
◽
Lin-Jeng Gu
◽
Trong-Yen Lee
Keyword(s):
Clock Tree
◽
Tree Construction
◽
X Architecture
◽
Zero Skew
Download Full-text
Zero skew clock routing in multiple-clock synchronous systems
IEEE/ACM International Conference on Computer-Aided Design
◽
10.1109/iccad.1992.279327
◽
1992
◽
Cited By ~ 5
Author(s):
Khan
◽
Hossain
◽
Sherwani
Keyword(s):
Synchronous Systems
◽
Clock Routing
◽
Zero Skew
Download Full-text
A clustering-based algorithm for zero-skew clock routing with buffer insertion
ASICON 2001. 2001 4th International Conference on ASIC Proceedings (Cat. No.01TH8549)
◽
10.1109/icasic.2001.982527
◽
2002
◽
Cited By ~ 2
Author(s):
Yi Liu
◽
Meng Zhao
◽
Xianlong Hong
◽
Yici Cai
◽
Weimin Wu
Keyword(s):
Buffer Insertion
◽
Clock Routing
◽
Zero Skew
Download Full-text
Zero skew clock routing with minimum wirelength
IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing
◽
10.1109/82.204128
◽
1992
◽
Vol 39
(11)
◽
pp. 799-814
◽
Cited By ~ 171
Author(s):
Ting-Hai Chao
◽
Yu-Chin Hsu
◽
Jan-Ming Ho
◽
A.B. Kahng
Keyword(s):
Clock Routing
◽
Zero Skew
Download Full-text
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