Performance linked dynamic cache tuning: A static energy reduction approach in tiled CMPs

2017 ◽  
Vol 52 ◽  
pp. 221-235
Author(s):  
Shounak Chakraborty ◽  
Hemangee K. Kapoor
Keyword(s):  
Energy Reduction ◽  
Cache Tuning ◽  
Static Energy ◽  
Reduction Approach

scholarly journals Energy-Conscious Turbo Decoder Design: A Joint Signal Processing and Transmit Energy Reduction Approach

2013 ◽  
Vol 62 (8) ◽  
pp. 3627-3638 ◽  
Author(s):  
Liang Li ◽  
Robert G. Maunder ◽  
Bashir M. Al-Hashimi ◽  
Mark Zwolinski ◽  
Lajos Hanzo
Keyword(s):  
Signal Processing ◽  
Energy Reduction ◽  
Turbo Decoder ◽  
Decoder Design ◽  
Reduction Approach

Static energy reduction techniques for microprocessor caches

2003 ◽  
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pp. 303-313 ◽  
Author(s):  
H. Hanson ◽  
M.S. Hrishikesh ◽  
V. Agarwal ◽  
S.W. Keckler ◽  
D. Burger
Keyword(s):  
Energy Reduction ◽  
Reduction Techniques ◽  
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Considerations for Static Energy Reduction in Digital CMOS ICs Using NEMS Power Gating

2017 ◽  
Vol 64 (3) ◽  
pp. 1399-1403 ◽  
Author(s):  
Sivaneswaran Sankar ◽  
Ulayil Sajesh Kumar ◽  
Mayank Goel ◽  
Maryam Shojaei Baghini ◽  
Valipe Ramgopal Rao
Keyword(s):  
Energy Reduction ◽  
Power Gating ◽  
Digital Cmos ◽  
Static Energy
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