Static energy reduction by performance linked dynamic cache resizing

2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsi-soc.2016.7753549 ◽

2016 ◽

Author(s):

Shounak Chakraborty ◽

Hemangee K. Kapoor

Keyword(s):

Energy Reduction ◽

Static Energy ◽

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Performance Constrained Static Energy Reduction Using Way-Sharing Target-Banks

2015 IEEE International Parallel and Distributed Processing Symposium Workshop ◽

10.1109/ipdpsw.2015.49 ◽

2015 ◽

Author(s):

Shounak Chakraborty ◽

Shirshendu Das ◽

Hemangee K. Kapoor

Keyword(s):

Energy Reduction ◽

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Static energy reduction techniques for microprocessor caches

Proceedings 2001 IEEE International Conference on Computer Design: VLSI in Computers and Processors. ICCD 2001 ◽

10.1109/iccd.2001.955040 ◽

2002 ◽

Author(s):

H. Hanson ◽

M.S. Hrishikesh ◽

V. Agarwal ◽

S.W. Keckler ◽

D. Burger

Keyword(s):

Energy Reduction ◽

Reduction Techniques ◽

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Static Energy Reduction in Cache Memories Using Data Compression

TENCON 2006 - 2006 IEEE Region 10 Conference ◽

10.1109/tencon.2006.343807 ◽

2006 ◽

Author(s):

Kiyofumi Tanaka ◽

Aiko Matsuda

Keyword(s):

Data Compression ◽

Energy Reduction ◽

Cache Memories ◽

Static Energy ◽

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Segment gating for static energy reduction in Networks-on-Chip

Proceedings of the 2nd International Workshop on Network on Chip Architectures - NoCArc '09 ◽

10.1145/1645213.1645227 ◽

2009 ◽

Author(s):

Kyle C. Hale ◽

Boris Grot ◽

Stephen W. Keckler

Keyword(s):

Energy Reduction ◽

Networks On Chip ◽

Static Energy ◽

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Static energy reduction techniques for microprocessor caches

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2003.812370 ◽

2003 ◽

Vol 11 (3) ◽

pp. 303-313 ◽

Author(s):

H. Hanson ◽

M.S. Hrishikesh ◽

V. Agarwal ◽

S.W. Keckler ◽

D. Burger

Keyword(s):

Energy Reduction ◽

Reduction Techniques ◽

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Performance linked dynamic cache tuning: A static energy reduction approach in tiled CMPs

Microprocessors and Microsystems ◽

10.1016/j.micpro.2017.06.012 ◽

2017 ◽

Vol 52 ◽

pp. 221-235

Author(s):

Shounak Chakraborty ◽

Hemangee K. Kapoor

Keyword(s):

Energy Reduction ◽

Cache Tuning ◽

Static Energy ◽

Reduction Approach

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Static energy reduction by performance linked cache capacity management in tiled CMPs

Proceedings of the 30th Annual ACM Symposium on Applied Computing - SAC '15 ◽

10.1145/2695664.2695763 ◽

2015 ◽

Author(s):

Hemangee K. Kapoor ◽

Shirshendu Das ◽

Shounak Chakraborty

Keyword(s):

Capacity Management ◽

Energy Reduction ◽

Static Energy ◽

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Considerations for Static Energy Reduction in Digital CMOS ICs Using NEMS Power Gating

IEEE Transactions on Electron Devices ◽

10.1109/ted.2017.2656802 ◽

2017 ◽

Vol 64 (3) ◽

pp. 1399-1403 ◽

Author(s):

Sivaneswaran Sankar ◽

Ulayil Sajesh Kumar ◽

Mayank Goel ◽

Maryam Shojaei Baghini ◽

Valipe Ramgopal Rao

Keyword(s):

Energy Reduction ◽

Power Gating ◽

Digital Cmos ◽

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Determining the inherent potential for specific energy reduction and variability attenuation in TMP-refining operations

Nordic Pulp & Paper Research Journal ◽

10.3183/npprj-2007-22-03-p299-306 ◽

2007 ◽

Vol 22 (3) ◽

pp. 299-306

Author(s):

Ilich Lama ◽

Michel Perrier ◽

Paul Stuart

Keyword(s):

Specific Energy ◽

Energy Reduction

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Technology Improvement Opportunities for Low Wind Speed Turbines and Implications for Cost of Energy Reduction

10.2172/1219451 ◽

2008 ◽

Author(s):

J. Cohen ◽

T. Schweizer ◽

A. Laxson ◽

S. Butterfield ◽

S. Schreck ◽

...

Keyword(s):

Energy Reduction ◽

Low Wind Speed ◽

Cost Of Energy ◽

Technology Improvement ◽

Technology Improvement Opportunities

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