A SPICE compatible physics-based intrinsic charge and capacitance model of InAs-OI-Si MOS transistor

Superlattices and Microstructures ◽

10.1016/j.spmi.2021.106975 ◽

2021 ◽

pp. 106975

Author(s):

Subir Kumar Maity ◽

Soumya Pandit

Keyword(s):

Mos Transistor ◽

Capacitance Model

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CREATING MOSFET NONLINEAR CAPACITANCE MODEL

CAD/EDA, MODELING AND SIMULATION IN MODERN ELECTRONICS: COLLECTION OF SCIENTIFIC PAPERS OF THE III INTERNATIONAL SCIENTIFIC AND PRACTICAL CONFERENCE ◽

10.30987/conferencearticle_5e028212defaa8.94622018 ◽

2019 ◽

Author(s):

Sergey Amelin ◽

Marina Amelina

Keyword(s):

Nonlinear Capacitance ◽

Mos Transistor ◽

Capacitance Model

The problems of model creating for nonlinear gate-drain capacitance of MOSFET are considered. A circuit is proposed for measuring this capacitance in the region of negative drain-gate voltages. The dependence of the gate-drain capacitance on voltage for the IRF540N transistor is constructed and an approximating function that can be used to create a model of a MOS-transistor is proposed.

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An efficient MOS transistor charge/capacitance model with continuous expressions for VLSI

ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187) ◽

10.1109/iscas.1998.705298 ◽

2002 ◽

Author(s):

S.H. Jen ◽

B.J. Sheu ◽

A.Y. Park

Keyword(s):

Mos Transistor ◽

Capacitance Model ◽

Charge Capacitance

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A unified submicrometer MOS transistor charge/capacitance model for mixed-signal IC's

IEEE Journal of Solid-State Circuits ◽

10.1109/4.736662 ◽

1999 ◽

Vol 34 (1) ◽

pp. 103-106 ◽

Author(s):

S.H. Jen ◽

B.J. Sheu ◽

Yoondong Park

Keyword(s):

Mixed Signal ◽

Mos Transistor ◽

Capacitance Model ◽

Charge Capacitance

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Low temperature behaviour of channel transit time constant in MOS transistor

IEE Proceedings G Circuits Devices and Systems ◽

10.1049/ip-g-2.1992.0017 ◽

1992 ◽

Vol 139 (1) ◽

pp. 104 ◽

Author(s):

A. Srivastava

Keyword(s):

Low Temperature ◽

Time Constant ◽

Transit Time ◽

Temperature Behaviour ◽

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NOVEL CALCULATIONS IN THE FIELD OF ACCURATE ANALYTICAL MOS TRANSISTOR MODELLING

Le Journal de Physique Colloques ◽

10.1051/jphyscol:1988451 ◽

1988 ◽

Vol 49 (C4) ◽

pp. C4-249-C4-252 ◽

Author(s):

L. LAUWERS ◽

K. DE MEYER

Keyword(s):

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Predicting Boron Adsorption Isotherms by Midwestern Soils using the Constant Capacitance Model

Soil Science Society of America Journal ◽

10.2136/sssaj2004.0795 ◽

2004 ◽

Vol 68 (3) ◽

pp. 795 ◽

Author(s):

Sabine Goldberg ◽

Donald L. Suarez ◽

Nicholas T. Basta ◽

Scott M. Lesch

Keyword(s):

Adsorption Isotherms ◽

Capacitance Model ◽

Boron Adsorption

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Constant Capacitance Model Computation of Boron Speciation for Varying Soil Water Content

Vadose Zone Journal ◽

10.2136/vzj2003.2530 ◽

2003 ◽

Vol 2 (2) ◽

pp. 253-258 ◽

Author(s):

P. J. Vaughan ◽

D. L. Suarez

Keyword(s):

Water Content ◽

Soil Water Content ◽

Model Computation ◽

Capacitance Model

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Parametric layout cell design of N-MOS transistor with enhanced radiation hardened properties

10.1063/5.0036567 ◽

2020 ◽

Author(s):

A. R. Serazetdinov ◽

E. V. Atkin ◽

K. O. Khokhlov

Keyword(s):

Cell Design ◽

Mos Transistor ◽

Radiation Hardened ◽

Hardened Properties

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Investigation into the effect of a “through silicon via”-process on the MOS transistor reliability of a standard 0.13µm CMOS technology

2010 IEEE International Integrated Reliability Workshop Final Report ◽

10.1109/iirw.2010.5706485 ◽

2010 ◽

Author(s):

Andreas Martin ◽

Ludger Borucki ◽

Hans Reisinger ◽

Christian Schlunder

Keyword(s):

Cmos Technology ◽

Through Silicon Via ◽

Mos Transistor ◽

Transistor Reliability

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An integrated MOS transistor associative memory system with 100 ns cycle time

10.1145/1465482.1465565 ◽

1967 ◽

Author(s):

Ryo Igarashi ◽

Toru Yaita

Keyword(s):

Associative Memory ◽

Memory System ◽

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