An efficient MOS transistor charge/capacitance model with continuous expressions for VLSI

Author(s):  
S.H. Jen ◽  
B.J. Sheu ◽  
A.Y. Park
Author(s):  
Sergey Amelin ◽  
Marina Amelina

The problems of model creating for nonlinear gate-drain capacitance of MOSFET are considered. A circuit is proposed for measuring this capacitance in the region of negative drain-gate voltages. The dependence of the gate-drain capacitance on voltage for the IRF540N transistor is constructed and an approximating function that can be used to create a model of a MOS-transistor is proposed.


1988 ◽  
Vol 49 (C4) ◽  
pp. C4-249-C4-252 ◽  
Author(s):  
L. LAUWERS ◽  
K. DE MEYER
Keyword(s):  

2004 ◽  
Vol 68 (3) ◽  
pp. 795 ◽  
Author(s):  
Sabine Goldberg ◽  
Donald L. Suarez ◽  
Nicholas T. Basta ◽  
Scott M. Lesch

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