scholarly journals Gold surface cleaning by etching polishing: Optimization of polycrystalline film topography and surface functionality for biosensing

2021 ◽  
Vol 22 ◽  
pp. 100818
Author(s):  
Borys Snopok ◽  
Arwa Laroussi ◽  
Clodomiro Cafolla ◽  
Kislon Voïtchovsky ◽  
Tetyana Snopok ◽  
...  
2018 ◽  
Vol 34 (2) ◽  
pp. 59
Author(s):  
Marcos Vinicius Foguel ◽  
Carolina Venturini Uliana ◽  
Paulo Roberto Ussoni Tomaz ◽  
Paulo Roberto Brasil De Oliveira Marques ◽  
Hideko Yamanaka ◽  
...  

Gold electrodes are widely used in electrochemistry and electroanalytical chemistry, due to the high purity, broad range of work potential as well as the possibility to control and modify the surface. On this work construction and cleaning of electrodes from gold recordables compact discs (CD-Rs), namely CDtrodes, are described. The CDs was submitted to the action of concentrated HNO3 in order to remove the protection layer and to expose the metallic layer; the electrode area was delimited by using galvanoplasty tape. The literature has been published many articles on CDtrode focused on the application but not on the cleaning; there is no register on galvanoplasty tape to define electrode area. Several methods for gold surface cleaning after attack of HNO3 were investigated, such as application of fixed potential in NaClsolution, successive scans in H2SO4 and ultrasound application, and best results were obtained in H2SO4 solution. This electrode material is interesting due to the performance comparable to the commercial electrodes, besides great versatility and low cost.


2009 ◽  
Vol 1176 ◽  
Author(s):  
Hyunjoon Song

AbstractExquisite control of surface functionality is essential to tailor the chemical and physical properties of metal nanocrystals to the requirements of specific applications. Hybridization of gold nanoparticles with other components such as polymers and metal oxides can effectively introduce appropriate functionalities on the surface without changing their own properties, and thereby become a basic architecture for various applications such as sensors and catalysts. In the present work, we report two hybrid nanostructures comprising gold nanocrystals. PDMAEMA (poly(dimethylaminoethylmethacrylate))–gold hybrid nanocrystals were synthesized via a polyol process, which produced carboxylate functionality on the gold surface. This hybrid structure was employed for a sensitive pH-sensor in solution. On the other hand, porous silica-gold hybrid nanoreactors were produced by selective etching of gold cores from gold@silica core-shell particles. The nanoreactor framework exhibited high and controllable activity on the reduction of aromatic nitroxides. These two examples of hybrid gold architectures would be able to apply for other metal and metal oxide systems to develop biosensors and energy production catalysts.


Author(s):  
C.M. Sung ◽  
M. Levinson ◽  
M. Tabasky ◽  
K. Ostreicher ◽  
B.M. Ditchek

Directionally solidified Si/TaSi2 eutectic composites for the development of electronic devices (e.g. photodiodes and field-emission cathodes) were made using a Czochralski growth technique. High quality epitaxial growth of silicon on the eutectic composite substrates requires a clean silicon substrate surface prior to the growth process. Hence a preepitaxial surface cleaning step is highly desirable. The purpose of this paper is to investigate the effect of surface cleaning methods on the epilayer/substrate interface and the characterization of silicon epilayers grown on Si/TaSi2 substrates by TEM.Wafers were cut normal to the <111> growth axis of the silicon matrix from an approximately 1 cm diameter Si/TaSi2 composite boule. Four pre-treatments were employed to remove native oxide and other contaminants: 1) No treatment, 2) HF only; 3) HC1 only; and 4) both HF and HCl. The cross-sectional specimens for TEM study were prepared by cutting the bulk sample into sheets perpendicular to the TaSi2 fiber axes. The material was then prepared in the usual manner to produce samples having a thickness of 10μm. The final step was ion milling in Ar+ until breakthrough occurred. The TEM samples were then analyzed at 120 keV using the Philips EM400T.


2018 ◽  
Author(s):  
Pierre Marcasuzaa ◽  
Samuel Pearson ◽  
Karell Bosson ◽  
Laurence Pessoni ◽  
Jean-Charles Dupin ◽  
...  

A hierarchically structured platform was obtained from spontaneous self-assembly of a poly(styrene)-<i>b</i>-poly(vinylbenzylchloride) (PS-<i>b</i>-PVBC) block copolymer (BCP) during breath figure (BF) templating. The BF process using a water/ethanol atmosphere gave a unique double porosity in which hexagonally arranged micron-sized pores were encircled by a secondary population of smaller, nano-sized pores. A third level of structuration was simultaneously introduced between the pores by directed BCP self-assembly to form out-of-the-plane nano-cylinders, offering very rapid bottom-up access to a film with unprecedented triple structure which could be used as a reactive platform for introducing further surface functionality. The surface nano-domains of VBC were exploited as reactive nano-patterns for site-specific chemical functionalization by firstly substituting the exposed chlorine moiety with azide, then “clicking” an alkyne by copper (I) catalyzed azide-alkyne Huisgen cycloaddition (CuAAC). Successful chemical modification was verified by NMR spectroscopy, FTIR spectroscopy, and XPS, with retention of the micro- and nanostructuration confirmed by SEM and AFM respectively. Protonation of the cyclotriazole surface groups triggered a switch in macroscopic behavior from a Cassie-Baxter state to a Wenzel state, highlighting the possibility of producing responsive surfaces with hierarchical structure.


Author(s):  
Norman J. Armendariz ◽  
Prawin Paulraj

Abstract The European Union is banning the use of Pb in electronic products starting July 1st, 2006. Printed circuit board assemblies or “motherboards” require that planned CPU sockets and BGA chipsets use lead-free solder ball compositions at the second level interconnections (SLI) to attach to a printed circuit board (PCB) and survive various assembly and reliability test conditions for end-use deployment. Intel is pro-actively preparing for this anticipated Pb ban, by evaluating a new lead free (LF) solder alloy in the ternary Tin- Silver-Copper (Sn4.0Ag0.5Cu) system and developing higher temperature board assembly processes. This will be pursued with a focus on achieving the lowest process temperature required to avoid deleterious higher temperature effects and still achieve a metallurgically compatible solder joint. One primary factor is the elevated peak reflow temperature required for surface mount technology (SMT) LF assembly, which is approximately 250 °C compared to present eutectic tin/lead (Sn37Pb) reflow temperatures of around 220 °C. In addition, extended SMT time-above-liquidus (TAL) and subsequent cooling rates are also a concern not only for the critical BGA chipsets and CPU BGA sockets but to other components similarly attached to the same PCB substrate. PCBs used were conventional FR-4 substrates with organic solder preservative on the copper pads and mechanical daisychanged FCBGA components with direct immersion gold surface finish on their copper pads. However, a materials analysis method and approach is also required to characterize and evaluate the effect of low peak temperature LF SMT processing on the PBA SLI to identify the absolute limits or “cliffs” and determine if the minimum processing temperature and TAL could be further lowered. The SLI system is characterized using various microanalytical techniques, such as, conventional optical microscopy, scanning electron microscopy, energy dispersive spectroscopy and microhardness testing. In addition, the SLI is further characterized using macroanalytical techniques such as dye penetrant testing (DPT) with controlled tensile testing for mechanical strength in addition to disbond and crack area mapping to complete the analysis.


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