SRAM on-chip monitoring methodology for high yield and energy efficient memory operation at near threshold voltage

Integration ◽  
2020 ◽  
Vol 74 ◽  
pp. 81-92
Author(s):  
Taehwan Kim ◽  
Kwangok Jeong ◽  
Jungyun Choi ◽  
Taewhan Kim ◽  
Kyumyung Choi
Keyword(s):  
Threshold Voltage ◽  
Energy Efficient ◽  
High Yield ◽  
On Chip ◽  
Efficient Memory ◽  
Near Threshold

scholarly journals Energy Efficient Network-on-Chip Architectures for Many-Core Near-Threshold Computing System

2019 ◽  
Vol 15 (2) ◽  
pp. 115-128 ◽  
Author(s):  
Chidhambaranathan Rajamanikkam ◽  
J. S. Rajesh ◽  
Koushik Chakraborty ◽  
Sanghamitra Roy
Keyword(s):  
Energy Efficient ◽  
Computing System ◽  
Network On Chip ◽  
On Chip ◽  
Many Core ◽  
Near Threshold

scholarly journals Exploiting Read/Write Asymmetry to Achieve Opportunistic SRAM Voltage Switching in Dual-Supply Near-Threshold Processors

2018 ◽  
Vol 8 (3) ◽  
pp. 28
Author(s):  
Yunfei Gu ◽  
Dengxue Yan ◽  
Vaibhav Verma ◽  
Pai Wang ◽  
Mircea Stan ◽  
...  
Keyword(s):  
Energy Efficiency ◽  
Energy Efficient ◽  
Switching Scheme ◽  
Promising Technique ◽  
Improve Energy Efficiency ◽  
Wide Range ◽  
Speed Up ◽  
On Chip ◽  
Voltage Switching ◽  
Near Threshold

Energy-efficient microprocessors are essential for a wide range of applications. While near-threshold computing is a promising technique to improve energy efficiency, optimal supply demands from logic core and on-chip memory are conflicting. In this paper, we perform static reliability analysis of 6T SRAM and discover the variance among different sizing configuration and asymmetric minimum voltage requirements between read and write operations. We leverage this asymmetric property i n near-threshold processors equipped with voltage boosting capability by proposing an opportunistic dual-supply switching scheme with a write aggregation buffer. Our results show that proposed technique improves energy efficiency by more than 21.45% with approximate 10.19% performance speed-up.

scholarly journals Exploiting Read/Write Asymmetry to Achieve Opportunistic SRAM Voltage Switching in Dual-Supply Near-Threshold Processors

2018 ◽  
Author(s):  
Yunfei Gu ◽  
Dengxue Yan ◽  
Vaibhav Verma ◽  
Pai Wang ◽  
Mircea Stan ◽  
...  
Keyword(s):  
Energy Efficiency ◽  
Energy Efficient ◽  
Switching Scheme ◽  
Promising Technique ◽  
Improve Energy Efficiency ◽  
Wide Range ◽  
Speed Up ◽  
On Chip ◽  
Voltage Switching ◽  
Near Threshold

Energy-efficient microprocessors are essential for a wide range of applications. While near-threshold computing is a promising technique to improve energy efficiency, optimal supply demands from logic core and on-chip memory are conflicting. In this paper, we perform static reliability analysis of 6T SRAM and discover the variance among different sizing configuration and asymmetric minimum voltage requirements between read and write operations. We leverage this asymmetric property in near-threshold processors equipped with voltage boosting capability by proposing an opportunistic dual-supply switching scheme with a write aggregation buffer. Our results show that proposed technique improves energy efficiency by more than 21.45% with approximate 10.19% performance speed-up.

scholarly journals Exploiting Read/Write Asymmetry to Achieve Opportunistic SRAM Voltage Switching in Dual-Supply Near-Threshold Processors

2018 ◽  
Author(s):  
Yunfei Gu ◽  
Dengxue Yan ◽  
Vaibhav Verma ◽  
Pai Wang ◽  
Mircea R. Stan ◽  
...  
Keyword(s):  
Energy Efficiency ◽  
Energy Efficient ◽  
Switching Scheme ◽  
Promising Technique ◽  
Improve Energy Efficiency ◽  
Wide Range ◽  
Speed Up ◽  
On Chip ◽  
Voltage Switching ◽  
Near Threshold

Energy-efficient microprocessors are essential for a wide range of applications. While near-threshold computing is a promising technique to improve energy efficiency, optimal supply demands from logic core and on-chip memory are conflicting. In this paper, we perform static reliability analysis of 6T SRAM and discover the variance among different sizing configuration and asymmetric minimum voltage requirements between read and write operations. We leverage this asymmetric property in near-threshold processors equipped with voltage boosting capability by proposing an opportunistic dual-supply switching scheme with a write aggregation buffer. Our results show that proposed technique improves energy efficiency by more than 21.45% with approximate 10.19% performance speed-up.

Reliable high-yield CNTFET-based 9T SRAM operating near threshold voltage region

2018 ◽  
Vol 17 (2) ◽  
pp. 774-783 ◽  
Author(s):  
Pramod Kumar Patel ◽  
M. M. Malik ◽  
Tarun K. Gupta
Keyword(s):  
Threshold Voltage ◽  
High Yield ◽  
Voltage Region ◽  
Near Threshold
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