New logical-sum and logical-product circuits using CMOS transistors and their applications to four-valued combinational circuits

1988 ◽  
Vol 19 (3) ◽  
pp. 52
Keyword(s):  
Combinational Circuits ◽  
Cmos Transistors ◽  
Logical Product

High Transport Si/SiGe Heterostructures for CMOS Transistors with Orientation and Strain Enhanced Mobility

2011 ◽  
Vol E94-C (5) ◽  
pp. 712-716 ◽  
Author(s):  
Jungwoo OH ◽  
Jeff HUANG ◽  
Injo OK ◽  
Se-Hoon LEE ◽  
Paul D. KIRSCH ◽  
...  
Keyword(s):  
Cmos Transistors ◽  
Enhanced Mobility

DESIGN FLOW OF CONCURRENT ERROR DETECTION SCHEMES FOR COMBINATIONAL CIRCUITS

2018 ◽  
Vol 65 ◽  
pp. 92-98
Author(s):  
A. L. Stempkovskiy ◽  
◽  
D. V. Telpukhov ◽  
A. I. Demeneva ◽  
T. D. Zhukova ◽  
...  
Keyword(s):  
Error Detection ◽  
Design Flow ◽  
Concurrent Error Detection ◽  
Combinational Circuits ◽  
Detection Schemes

On Deducing the Clique Potential of Nanoscale Combinational Circuits

2013 ◽  
Vol 9 (4) ◽  
pp. 514-520
Author(s):  
P. Balasubramanian ◽  
K. Prasad
Keyword(s):  
Combinational Circuits

Accounting for Dose-Enhancement Effects with CMOS Transistors

1985 ◽  
Vol 32 (6) ◽  
pp. 4369-4375 ◽  
Author(s):  
D. M. Fleetwood ◽  
P. S. Winokur ◽  
R. W. Beegle ◽  
P. V. Dressendorfer ◽  
B. L. Draper
Keyword(s):  
Dose Enhancement ◽  
Cmos Transistors
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