Unexpected phosphorus doping routine of planar silicon nanowires for integrating CMOS logics.

Nanoscale ◽  
2021 ◽  
Author(s):  
Ying Sun ◽  
Wentao Qian ◽  
Shuaishuai Liu ◽  
Taige Dong ◽  
Junzhuan Wang ◽  
...  
Keyword(s):  
Thin Film ◽  
Silicon Nanowires ◽  
High Performance ◽  
Silicon Nanowire ◽  
Doping Control ◽  
Phosphorus Doping ◽  
Planar Silicon ◽  
Amorphous Si ◽  
Solid Liquid ◽  
Si Thin Film

Complementary doping control in silicon nanowire (SiNW) channels is crucial for the construction of high-performance CMOS logics. Though planar in-plane solid-liquid-solid (IPSLS) growth, with amorphous Si (a-Si) thin film as...

scholarly journals High Performance and Low power Monolithic Three-Dimensional Sub-50 nm Poly Si Thin film transistor (TFTs) Circuits

2017 ◽  
Vol 7 (1) ◽  
Author(s):  
Tsung-Ta Wu ◽  
Wen-Hsien Huang ◽  
Chih-Chao Yang ◽  
Hung-Chun Chen ◽  
Tung-Ying Hsieh ◽  
...  
Keyword(s):  
Thin Film ◽  
Low Power ◽  
High Performance ◽  
Thin Film Transistor ◽  
Three Dimensional ◽  
Si Thin Film

Flat Panel Imagers Based on Excimer Laser Annealed, poly-Si Thin Film Transistor Technology

2001 ◽  
Vol 685 ◽  
Author(s):  
J.P. Lu ◽  
K. Van Schuylenbergh ◽  
R. T. Fulks ◽  
J. Ho ◽  
Y. Wang ◽  
...  
Keyword(s):  
Thin Film ◽  
Excimer Laser ◽  
High Performance ◽  
Laser Annealing ◽  
Noise Performance ◽  
Large Area ◽  
Flat Panel ◽  
Excimer Laser Annealing ◽  
Flat Panel Imagers ◽  
Si Thin Film

AbstractPulsed Excimer-Laser Annealing (ELA) has become an important technology to produce high performance, poly-Si Thin Film Transistors (TFTs) for large area electronics. The much-improved performance of these poly-Si TFTs over the conventional hydrogenated amorphous Si TFTs enables the possibility of building next generation flat panel imagers with higher-level integration and better noise performance. Both the on-glass integration of peripheral driver electronics to reduce the cost of interconnection and the integration of a pixel level amplifier to improve the noise performance of large area imagers have been demonstrated and are discussed in this paper.

Dye-Improved Optical Absorption of Vertically Aligned Silicon Nanowire Arrays Synthesized by Electroless Etching of Silicon Wafer

2014 ◽  
Vol 895 ◽  
pp. 200-203 ◽  
Author(s):  
Hui Chiang Teoh ◽  
Sabar Derita Hutagalung
Keyword(s):  
Silicon Nanowires ◽  
High Performance ◽  
Silicon Nanowire ◽  
Incident Light ◽  
Electroless Etching ◽  
Dye Sensitized ◽  
Silicon Nanowire Arrays ◽  
Wide Range ◽  
Vertically Aligned ◽  
Si Wafer

Silicon nanowires (SiNWs) are important candidate for high performance electronic and optoelectronic devices due to their unique structures, electrical and optical properties. SiNWs were fabricated by silver-assisted electroless etching of Si wafer. Vertically aligned SiNW arrays with length about 8.75 μm and diameter of less than 90 nm have been fabricated. The reflectance of SiNWs without dye (12%) is greatly lower compared to bare Si wafer (25%). Therefore, SiNWs on Si substrate can be used as a good anti-reflection layer for a wide range of incident light. The reflectance of dye-sensitized SiNWs with red, green and blue dyes is 7%, 5.5%, and 5% respectively. The results confirmed that the reflectance of SiNWs with dye is much lower compared to SiNWs without dye and bare Si wafer. It was proven that dye on SiNWs can be used to reduce the reflectance (improved absorption) about 40% compared to SiNWs without dye.

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