Low complexity lowpass linear‐phase multiplierless FIR filter

2013 ◽  
Vol 49 (18) ◽  
pp. 1133-1135 ◽  
Author(s):  
V.D. Pavlović ◽  
D.S. Antić ◽  
S.S. Nikolić ◽  
S.Lj. Perić
2012 ◽  
Vol 571 ◽  
pp. 534-537
Author(s):  
Bao Feng Zhang ◽  
De Hu Man ◽  
Jun Chao Zhu

The article proposed a new method for implementing linear phase FIR filter based on FPGA. For the key to implementing the FIR filter on FPGA—multiply-add operation, a parallel distributed algorithm was presented, which is based on LUT. The designed file was described with VHDL and realized on Altera’s field programmable gate array (FPGA), giving the design method. The experimental results indicated that the system can run stably at 120MHz or more, which can meet the requirements of signal processing for real-time.


2013 ◽  
Vol 284-287 ◽  
pp. 1627-1632
Author(s):  
Hsieh Chang Huang ◽  
Ching Tang Hsieh ◽  
Guang Lin Hsieh

An ultra-low power, portable, and easily implemented Holter recorder is necessary for patients or researchers of electrocardiogram (ECG). Such a Holter recorder with off-the-shelf components is realized with mixed signal processor (MSP) in this paper. To decrease the complexity of analog circuits and the interference of 60 Hz noise from power line, we use the MSP to implement a finite impulse response (FIR) filter which is equiripple design. We also integrate the ring buffer for the input samples and the symmetrical characteristic of the FIR filter for efficiently computing convolution. The experimental results show that the ECG output signal with the PQRST feature is easy to be distinguished. This ECG signal is recorded for 24 hours using a SD card. Furthermore, the ECG signal is transmitted with a smartphone via Bluetooth to decrease the burden of the Holter recorder. As a result, this paper uses the Lomb method for the spectral analysis of Heart Rate Variability (HRV) better than Fast Fourier Transform (FFT).


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