Function of One Regular Separable Relation Set Decided for the Minimal Covering in Multiple Valued Logic

MATEC Web of Conferences ◽

10.1051/matecconf/20166304036 ◽

2016 ◽

Vol 63 ◽

pp. 04036

Author(s):

Yu Zhen Liu ◽

Min Liu ◽

Xing Bao Liu ◽

Xin Fen Zhang

Keyword(s):

Minimal Covering ◽

Multiple Valued Logic

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The Gradual Minimal Covering Location Problem

SSRN Electronic Journal ◽

10.2139/ssrn.3522777 ◽

2020 ◽

Author(s):

Mostafa Khatami ◽

Amir Salehipour

Keyword(s):

Location Problem ◽

Minimal Covering

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Multiple-valued logic circuits using resonant tunneling diodes

1997 Advanced Workshop on Frontiers in Electronics, WOFE '97 Proceedings ◽

10.1109/wofe.1997.621174 ◽

2002 ◽

Author(s):

P. Mazumder

Keyword(s):

Resonant Tunneling ◽

Logic Circuits ◽

Resonant Tunneling Diodes ◽

Tunneling Diodes ◽

Multiple Valued Logic

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Current-mode CMOS multiple-valued logic circuits

IEEE Journal of Solid-State Circuits ◽

10.1109/4.272112 ◽

1994 ◽

Vol 29 (2) ◽

pp. 95-107 ◽

Author(s):

K.W. Current

Keyword(s):

Current Mode ◽

Logic Circuits ◽

Multiple Valued Logic

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Proceedings of 1993 IEEE International Symposium on Multiple Valued Logic (ISMVL '93)

[1993] Proceedings of the Twenty-Third International Symposium on Multiple-Valued Logic ◽

10.1109/ismvl.1993.289590 ◽

1993 ◽

Keyword(s):

International Symposium ◽

Multiple Valued Logic ◽

Ieee International Symposium

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Design and reliability analysis of multiple valued logic gates using carbon nanotube FETs

Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures - NANOARCH '12 ◽

10.1145/2765491.2765515 ◽

2012 ◽

Author(s):

Jinghang Liang ◽

Jie Han ◽

Linbin Chen ◽

Fabrizio Lombardi

Keyword(s):

Carbon Nanotube ◽

Reliability Analysis ◽

Logic Gates ◽

Multiple Valued Logic ◽

Carbon Nanotube Fets

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Maximal and Minimal Closed Classes in Multiple-Valued Logic

2014 IEEE 44th International Symposium on Multiple-Valued Logic ◽

10.1109/ismvl.2014.18 ◽

2014 ◽

Author(s):

Tamas Waldhauser

Keyword(s):

Multiple Valued Logic

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Appendum to 'Multiple-valued logic: a tutorial and appreciation' (April 1988 17-27)

Computer ◽

10.1109/2.86781 ◽

1988 ◽

Vol 21 (11) ◽

pp. 9

Author(s):

Y.-C.D. Lie

Keyword(s):

Multiple Valued Logic

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Efficient derivation of Reed-Muller expansions in multiple-valued logic systems

[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic ◽

10.1109/ismvl.1992.186828 ◽

2003 ◽

Author(s):

B. Harking ◽

C. Moraga

Keyword(s):

Multiple Valued Logic ◽

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Current-mode CMOS multiple-valued logic function realization using a direct cover algorithm

Proceedings 25th International Symposium on Multiple-Valued Logic ◽

10.1109/ismvl.1995.513534 ◽

2002 ◽

Author(s):

A.K. Jain ◽

M.H. Abd-El-Barr ◽

R.J. Bolton

Keyword(s):

Current Mode ◽

Logic Function ◽

Multiple Valued Logic

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Voltage-controlled multiple-valued logic design using negative differential resistance devices

Solid-State Electronics ◽

10.1016/j.sse.2010.08.007 ◽

2010 ◽

Vol 54 (12) ◽

pp. 1637-1640 ◽

Author(s):

Kwang-Jow Gan ◽

Cher-Shiung Tsai ◽

Yan-Wun Chen ◽

Wen-Kuan Yeh

Keyword(s):

Negative Differential Resistance ◽

Differential Resistance ◽

Logic Design ◽

Multiple Valued Logic

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