Native point defects in low‐temperature‐grown GaAs

1995 ◽  
Vol 67 (2) ◽  
pp. 279-281 ◽  
Author(s):  
X. Liu ◽  
A. Prasad ◽  
J. Nishio ◽  
E. R. Weber ◽  
Z. Liliental‐Weber ◽  
...  
2006 ◽  
Vol 527-529 ◽  
pp. 717-720 ◽  
Author(s):  
Sashi Kumar Chanda ◽  
Yaroslav Koshka ◽  
Murugesu Yoganathan

A room temperature PL mapping technique was applied to establish the origin of resistivity variation in PVT-grown 6H SiC substrates. A direct correlation between the native defect-related PL and resistivity was found in undoped (V-free) samples. In vanadium-doped samples with low vanadium content, the resistivity showed a good correlation with the total PL signal consisting of contributions from both vanadium and native point defects. Well-known UD1 and UD3 levels were revealed by low-temperature PL spectroscopy. Some correlation was observed between these low-temperature PL signatures and the resistivity distribution.


1996 ◽  
Vol 69 (10) ◽  
pp. 1465-1467 ◽  
Author(s):  
A. J. Lochtefeld ◽  
M. R. Melloch ◽  
J. C. P. Chang ◽  
E. S. Harmon

2012 ◽  
Vol 9 (7) ◽  
pp. 1693-1695
Author(s):  
Juozas Adamonis ◽  
Klemensas Bertulis ◽  
Andrius Bičiūnas ◽  
Ramūnas Adomavičius ◽  
Arūnas Krotkus

2010 ◽  
Vol 405 (19) ◽  
pp. 4133-4138 ◽  
Author(s):  
D.W. Jung ◽  
J.P. Noh ◽  
N. Otsuka

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