A graph representation for programmable logic arrays to facilitate testing and logic design
1998 ◽
Vol 17
(10)
◽
pp. 1030-1043
1979 ◽
Vol C-28
(9)
◽
pp. 609-617
◽
1993 ◽
Vol 30
(3)
◽
pp. 216-223
◽
2011 ◽
Vol 45
(5)
◽
pp. 259-267