Performance analysis of the adaptive parity check matrix based soft-decision decoding algorithm

Author(s):  
A. Ahmed ◽  
R. Koetter ◽  
N.R. Shanbhag
2020 ◽  
Vol 14 (12) ◽  
pp. 1968-1974
Author(s):  
Oluwaseyi P. Babalola ◽  
Olayinka O. Ogundile ◽  
Daniel Jaco J. Versfeld

2013 ◽  
Vol 791-793 ◽  
pp. 1867-1871
Author(s):  
Ji Qu Han ◽  
Li Liu

Designers are increasingly relying on FPGA-based emulation to evaluate the performance of LDPC codes. In this paper, we propose a novel approximate lower triangular structure for the parity part of the parity-check matrix of QC-LDPC codes. Next, a high speed partially parallel decoder architecture which based on the Offset BP-based decoding algorithm is proposed. The results indicate that the frequency can reach 100MHz and its throughput rate can reach 113Mbps.


2013 ◽  
Vol 3 (1-2) ◽  
Author(s):  
Nguyen Tung Hung

The article introduces a new LDPC decoding algorithm based on Equivalent Parity Check Matrix. Simulation results show that the new LDPC decoding algorithm can improve LDPC decoding performance. Compared to some other improvements, the new LDPC decoding algorithm, which is simpler, can detect errors and be applied to LDPC codes for great-length LDPC codes.


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