A reverse converter for the 4-moduli superset {2/sup n/-1, 2/sup n/, 2/sup n/+1, 2/sup n+1/+1}

2003 ◽  
Author(s):  
M. Bhardwaj ◽  
T. Srikanthan ◽  
C.T. Clarke
Keyword(s):  
Reverse Converter

scholarly journals Fast and energy-efficient FPGA realization of RNS reverse converter for the ternary 3-moduli set {3n–2, 3n–1, 3n}

2020 ◽  
Vol 2 (2) ◽  
Author(s):  
Pooriya NavaeiLavasani ◽  
Shokoufeh Adeli ◽  
MohammadReza Taheri ◽  
Mohammad Hossein Moaiyeri ◽  
Keivan Navi
Keyword(s):  
Energy Efficient ◽  
Reverse Converter

A MEMORYLESS REVERSE CONVERTER FOR THE 4-MODULI SUPERSET {2n - 1, 2n, 2n + 1, 2n + 1 - 1}

2000 ◽  
Vol 10 (01n02) ◽  
pp. 85-99 ◽  
Author(s):  
A. P VINOD ◽  
A. BENJAMIN PREMKUMAR
Keyword(s):  
High Performance ◽  
Dynamic Range ◽  
Number System ◽  
Residue Number System ◽  
Main Challenge ◽  
Reverse Converter ◽  
Residue Number ◽  
Compensation Technique ◽  
The Common ◽  
Performance Computing

This paper presents a residue number system to binary converter in the four moduli set {2n - 1, 2n, 2n + 1, 2n + 1 - 1}, valid for even values of n. This moduli set is an extension of the popular set {2n - 1, 2n + 1}. The number theoretic properties of the moduli set of the form 2n ± 1 are exploited to design the converter. The main challenge of dealing with fractions in Residue Number System is overcome by using the fraction compensation technique. A hardware implementation using only adders is also proposed. When compared to the common three moduli reverse converters, this four moduli converter offers a larger dynamic range and higher parallelism, which makes it useful for high performance computing.

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