A Fully-Pipelined Parallel Architecture for Kalman Tracking Filter

Author(s):  
Zaher Merhi ◽  
Milad Ghantous ◽  
Mohammad Elgamel ◽  
Magdy Bayoumi ◽  
Ayman El-Desouki
MRS Bulletin ◽  
1997 ◽  
Vol 22 (10) ◽  
pp. 5-6
Author(s):  
Horst D. Simon

Recent events in the high-performance computing industry have concerned scientists and the general public regarding a crisis or a lack of leadership in the field. That concern is understandable considering the industry's history from 1993 to 1996. Cray Research, the historic leader in supercomputing technology, was unable to survive financially as an independent company and was acquired by Silicon Graphics. Two ambitious new companies that introduced new technologies in the late 1980s and early 1990s—Thinking Machines and Kendall Square Research—were commercial failures and went out of business. And Intel, which introduced its Paragon supercomputer in 1994, discontinued production only two years later.During the same time frame, scientists who had finished the laborious task of writing scientific codes to run on vector parallel supercomputers learned that those codes would have to be rewritten if they were to run on the next-generation, highly parallel architecture. Scientists who are not yet involved in high-performance computing are understandably hesitant about committing their time and energy to such an apparently unstable enterprise.However, beneath the commercial chaos of the last several years, a technological revolution has been occurring. The good news is that the revolution is over, leading to five to ten years of predictable stability, steady improvements in system performance, and increased productivity for scientific applications. It is time for scientists who were sitting on the fence to jump in and reap the benefits of the new technology.


2011 ◽  
Vol E94-C (10) ◽  
pp. 1698-1701
Author(s):  
Yang SUN ◽  
Chang-Jin JEONG ◽  
In-Young LEE ◽  
Sang-Gug LEE

1991 ◽  
Author(s):  
Eric A. Brewer ◽  
Chrysanthos N. Dellarocas ◽  
Adrian Colbrook ◽  
William E. Weihl

2013 ◽  
Vol 313-314 ◽  
pp. 1115-1119
Author(s):  
Yong Qi Wang ◽  
Feng Yang ◽  
Yan Liang ◽  
Quan Pan

In this paper, a novel method based on cubature Kalman filter (CKF) and strong tracking filter (STF) has been proposed for nonlinear state estimation problem. The proposed method is named as strong tracking cubature Kalman filter (STCKF). In the STCKF, a scaling factor derived from STF is added and it can be tuned online to adjust the filtering gain accordingly. Simulation results indicate STCKF outperforms over EKF and CKF in state estimation accuracy.


Electronics ◽  
2021 ◽  
Vol 10 (9) ◽  
pp. 1106
Author(s):  
Vladimir L. Petrović ◽  
Dragomir M. El Mezeni ◽  
Andreja Radošević

Quasi-cyclic low-density parity-check (QC–LDPC) codes are introduced as a physical channel coding solution for data channels in 5G new radio (5G NR). Depending on the use case scenario, this standard proposes the usage of a wide variety of codes, which imposes the need for high encoder flexibility. LDPC codes from 5G NR have a convenient structure and can be efficiently encoded using forward substitution and without computationally intensive multiplications with dense matrices. However, the state-of-the-art solutions for encoder hardware implementation can be inefficient since many hardware processing units stay idle during the encoding process. This paper proposes a novel partially parallel architecture that can provide high hardware usage efficiency (HUE) while achieving encoder flexibility and support for all 5G NR codes. The proposed architecture includes a flexible circular shifting network, which is capable of shifting a single large bit vector or multiple smaller bit vectors depending on the code. The encoder architecture was built around the shifter in a way that multiple parity check matrix elements can be processed in parallel for short codes, thus providing almost the same level of parallelism as for long codes. The processing schedule was optimized for minimal encoding time using the genetic algorithm. The optimized encoder provided high throughputs, low latency, and up-to-date the best HUE.


2001 ◽  
Vol 29 (5) ◽  
pp. 9-12
Author(s):  
S. Bartolini ◽  
R. Giorgi ◽  
J. Protic ◽  
C. A. Prete ◽  
M. Valero

Electronics ◽  
2021 ◽  
Vol 10 (15) ◽  
pp. 1778
Author(s):  
Binhao He ◽  
Meiting Xue ◽  
Shubiao Liu ◽  
Wei Luo

As one of the most important operations in relational databases, the join is data-intensive and time-consuming. Thus, offloading this operation using field-programmable gate arrays (FPGAs) has attracted much interest and has been broadly researched in recent years. However, the available SRAM-based join architectures are often resource-intensive, power-consuming, or low-throughput. Besides, a lower match rate does not lead to a shorter operation time. To address these issues, a Bloom filter (BF)-based parallel join architecture is presented in this paper. This architecture first leverages the BF to discard the tuples that are not in the join result and classifies the remaining tuples into different channels. Second, a binary search tree is used to reduce the number of comparisons. The proposed method was implemented on a Xilinx FPGA, and the experimental results show that under a match rate of 50%, our architecture achieved a high join throughput of 145.8 million tuples per second and a maximum acceleration factor of 2.3 compared to the existing SRAM-based join architectures.


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