High-density, high performance data storage via volume holography

2003 ◽  
Author(s):  
W.L. Wilson ◽  
K. Curtis ◽  
M. Tackitt ◽  
A. Hill ◽  
T. Richardson ◽  
...  
Keyword(s):  
Data Storage ◽  
High Performance ◽  
High Density ◽  
Performance Data ◽  
Volume Holography

scholarly journals Research and Application of High-Performance Data Storage and Transmission Technology in Microservice Environment

2020 ◽  
Vol 1616 ◽  
pp. 012092
Author(s):  
Kunying Li ◽  
Yu Ding ◽  
Ying Shi ◽  
Liling Wang ◽  
Zebing Zhen
Keyword(s):  
Data Storage ◽  
High Performance ◽  
Performance Data

scholarly journals Realization of Dynamic Interface and High Performance Data Retrieval

2017 ◽  
Vol 10 (4) ◽  
pp. 16
Author(s):  
Haifeng Jiang ◽  
Chang Wan
Keyword(s):  
Data Storage ◽  
High Performance ◽  
Data Retrieval ◽  
Performance Data ◽  
Storage Model ◽  
Model Based ◽  
Software Designers ◽  
Business System ◽  
Dynamic Interface ◽  
Database Storage

This paper introduces a method to realize dynamic interface, and designs a database storage model based on XML field technology to realize convenient data storage, any combination condition retrieval function and how to improve the retrieval speed in this kind of storage model. Usually a business system needs to provide information entry and retrieval functions, software designers have to design the appropriate entry items, input interface and retrieval functions for each business system and spend too much time on the repetitive works. And later engineers have to maintain the changing needs of the entry project, so we can apply the dynamic interface technology to achieve the customize needs of input items by the user, reducing the time of the repetitive works. Dynamic interface technology includes the realization of database storage and high performance data retrieval. This paper explores a storage model based on XML database to realize common and efficient storage and discuss on how to improve the retrieval speed in this kind of storage model.

Sub-20nm Device Voltage-Sensitive SRAM Characterization and Failure Analysis

2018 ◽  
Author(s):  
Seng Nguon Ting ◽  
Hsien-Ching Lo ◽  
Donald Nedeau ◽  
Aaron Sinnott ◽  
Felix Beaudoin
Keyword(s):  
Failure Analysis ◽  
High Performance ◽  
Yield Loss ◽  
Technology Development ◽  
High Density ◽  
High K ◽  
Yield Learning ◽  
Oxide Deposition ◽  
Edge Profile ◽  
High K Dielectric

Abstract With rapid scaling of semiconductor devices, new and more complicated challenges emerge as technology development progresses. In SRAM yield learning vehicles, it is becoming increasingly difficult to differentiate the voltage-sensitive SRAM yield loss from the expected hard bit-cells failures. It can only be accomplished by extensively leveraging yield, layout analysis and fault localization in sub-micron devices. In this paper, we describe the successful debugging of the yield gap observed between the High Density and the High Performance bit-cells. The SRAM yield loss is observed to be strongly modulated by different active sizing between two pull up (PU) bit-cells. Failure analysis focused at the weak point vicinity successfully identified abnormal poly edge profile with systematic High k Dielectric shorts. Tight active space on High Density cells led to limitation of complete trench gap-fill creating void filled with gate material. Thanks to this knowledge, the process was optimized with “Skip Active Atomic Level Oxide Deposition” step improving trench gap-fill margin.

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