Optical-to-Wireless Carrier Frequency Down-Conversion by UTC-PD-Integrated HEMT: Dependence of Conversion Gain on UTC-PD Mesa Size

Author(s):  
K. Nishimura ◽  
T. Hosotani ◽  
D. Nakajima ◽  
T. Suemitsu ◽  
K. Iwatsuki ◽  
...  
2017 ◽  
Vol 93 (1) ◽  
pp. 49-59 ◽  
Author(s):  
Yo-Sheng Lin ◽  
Ming-Huang Kao ◽  
Hou-Ru Pan ◽  
Kai-Siang Lan

Author(s):  
Yuya Omori ◽  
Tomotaka Hosotani ◽  
Taiichi Otsuji ◽  
Katsumi Iwatsuki ◽  
Akira Satou

2014 ◽  
Vol 24 (01) ◽  
pp. 1550002 ◽  
Author(s):  
Mina Amiri ◽  
Adib Abrishamifar

In this paper a new high-linear CMOS mixer is proposed. A well-known low voltage CMOS multiplier structure is used for mixer application in this paper and its linearity is provided by adjusting the value of a resistor, sizing the aspect ratio of a PMOS transistor and adding a proper value of inductor at the input stage. In simulation, a supply voltage as low as 1 V is applied to the circuit. Simulation results of improved mixer in a 0.18-μm CMOS technology illustrate 14 dB increases in IIP3 and also an increase around 1.4 dB is obtained in conversion gain. Furthermore, additional components which are used for improving linearity would not increase the power consumption and area significantly.


Electronics ◽  
2019 ◽  
Vol 8 (5) ◽  
pp. 593
Author(s):  
Hyunki Jung ◽  
Dzuhri Radityo Utomo ◽  
Saebyeok Shin ◽  
Seok-Kyun Han ◽  
Sang-Gug Lee ◽  
...  

A broadband receiver front-end with low noise figure and flat conversion gain response is presented in this paper. The receiver front-end is a part of the broadband spectrum sensing receiver and processes 30–40 GHz of broad input spectrum followed by down-conversion to DC-10 GHz of IF signal. The proposed work is comprised of a low noise amplifier (LNA), on-chip passive Balun, down conversion mixer, and output buffer. To achieve front-end target specification over 10 GHz input bandwidth, the stagger-tuned LNA is employed and the down conversion mixer is loaded with a 3rd-order LC ladder low pass filter. The prototype chip was implemented in 45 nm CMOS technology. The chip achieves 10.3–16.5 dB conversion gain, 5.9 dB integrated NF, and −11 dBm IIP3 from 30 to 40 GHz. The chip is realized within 0.42 mm 2 and consumes 96 mW from a 1.2 V supply.


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