A 90–96 GHz CMOS down-conversion mixer with high conversion gain and excellent LO–RF isolation

2017 ◽  
Vol 93 (1) ◽  
pp. 49-59 ◽  
Author(s):  
Yo-Sheng Lin ◽  
Ming-Huang Kao ◽  
Hou-Ru Pan ◽  
Kai-Siang Lan
Keyword(s):  
High Conversion ◽  
Conversion Gain ◽  
Down Conversion

A 90–96 GHz CMOS down-conversion mixer with high conversion gain and excellent LO-RF isolation

2017 ◽  
Author(s):  
Yo-Sheng Lin ◽  
Kai-Siang Lan ◽  
Yun-Wen Lin ◽  
Hou-Ru Pan ◽  
Chih-Chung Chen ◽  
...  
Keyword(s):  
High Conversion ◽  
Conversion Gain ◽  
Down Conversion

High conversion gain V-band quadruple subharmonic mixer using cascode structure

2003 ◽  
Author(s):  
Dan An ◽  
Sung Chan Kim ◽  
Woo Suk Sul ◽  
Hyo Jong Han ◽  
Han Shin Lee ◽  
...  
Keyword(s):  
High Conversion ◽  
Conversion Gain ◽  
V Band

A High-Linear CMOS Down Conversion Mixer Using Adjusting the Second and Third-Order Harmonic in Transconductance Stage

2014 ◽  
Vol 24 (01) ◽  
pp. 1550002 ◽  
Author(s):  
Mina Amiri ◽  
Adib Abrishamifar
Keyword(s):  
Low Voltage ◽  
Supply Voltage ◽  
Circuit Simulation ◽  
Cmos Technology ◽  
Conversion Gain ◽  
Third Order ◽  
Cmos Mixer ◽  
Simulation Results ◽  
Down Conversion ◽  
Pmos Transistor

In this paper a new high-linear CMOS mixer is proposed. A well-known low voltage CMOS multiplier structure is used for mixer application in this paper and its linearity is provided by adjusting the value of a resistor, sizing the aspect ratio of a PMOS transistor and adding a proper value of inductor at the input stage. In simulation, a supply voltage as low as 1 V is applied to the circuit. Simulation results of improved mixer in a 0.18-μm CMOS technology illustrate 14 dB increases in IIP3 and also an increase around 1.4 dB is obtained in conversion gain. Furthermore, additional components which are used for improving linearity would not increase the power consumption and area significantly.

Sign in / Sign up

Export Citation Format

Share Document