A single phase multilevel inverter using switched series/parallel DC voltage sources

Author(s):  
Y. Hinago ◽  
H. Koizumi
2019 ◽  
Vol 28 (06) ◽  
pp. 1950089 ◽  
Author(s):  
V. Thiyagarajan ◽  
P. Somasundaram ◽  
K. Ramash Kumar

Multilevel inverter (MLI) has become more popular in high power, high voltage industries owing to its high quality output voltage waveform. This paper proposes a novel single phase extendable type MLI topology. The term ‘extendable’ is included since the presented topology can be extended with maximum number of dc voltage sources to synthesize larger output levels. This topology can be operated in both symmetrical and asymmetrical conditions. The major advantages of the proposed inverter topology include minimum switching components, reduced gate driver circuits, less harmonic distortion and reduced switching losses. The comparative analysis based on the number of switches, dc voltage sources and conduction switches between the proposed topology and other existing topologies is presented in this paper. The comparison results show that the proposed inverter topology requires fewer components. The performance of the proposed MLI topology has been analyzed in both symmetrical and asymmetrical conditions. The simulation model is developed using MATLAB/SIMULINK software to verify the performance of the proposed inverter topology and also the feasibility of the presented topology during the symmetrical condition has been validated experimentally.


Author(s):  
S. Sridhar ◽  
P. Satish Kumar ◽  
M. Susham

<p>This paper presents a novel topology of Single-phase multilevel inverter for low and high power applications. It consists of polarity (Level) generation circuit and H Bridge to generate both positive and negative polarities. The proposed topology can produce more output voltage levels by switching dc voltage sources in series and parallel. The proposed topology utilizes minimum number of power electronic devices which leads to the reduction of cost, size, and weight low and consumes low power which improves the efficiency. Switching pulses are generated using Phase disposition (PD) pulse width modulation technique. Finally the effectiveness of the proposed topology is verified using MATLAB/SIMULINK software tool. 7level asymmetrical multilevel inverter prototype hardware is prepared to support the proposed topology to verify the effectiveness and its validity.</p>


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